DE602006017589D1 - Multiplikator - Google Patents

Multiplikator

Info

Publication number
DE602006017589D1
DE602006017589D1 DE602006017589T DE602006017589T DE602006017589D1 DE 602006017589 D1 DE602006017589 D1 DE 602006017589D1 DE 602006017589 T DE602006017589 T DE 602006017589T DE 602006017589 T DE602006017589 T DE 602006017589T DE 602006017589 D1 DE602006017589 D1 DE 602006017589D1
Authority
DE
Germany
Prior art keywords
operand
multiplier
segments
multipliers
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006017589T
Other languages
English (en)
Inventor
Wajdi K Feghali
William C Hasenplaugh
Gilbert M Wolrich
Daniel F Cutter
Vinodh Gopal
Gunnar Gaubatz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE602006017589D1 publication Critical patent/DE602006017589D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/527Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
    • G06F7/5272Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products
    • G06F7/5275Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products using carry save adders
DE602006017589T 2005-12-30 2006-12-18 Multiplikator Active DE602006017589D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/323,994 US8073892B2 (en) 2005-12-30 2005-12-30 Cryptographic system, method and multiplier
PCT/US2006/048417 WO2007078939A2 (en) 2005-12-30 2006-12-18 Multiplier

Publications (1)

Publication Number Publication Date
DE602006017589D1 true DE602006017589D1 (de) 2010-11-25

Family

ID=38093399

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006017589T Active DE602006017589D1 (de) 2005-12-30 2006-12-18 Multiplikator

Country Status (6)

Country Link
US (1) US8073892B2 (de)
EP (1) EP1966680B1 (de)
CN (2) CN101149675A (de)
AT (1) ATE484789T1 (de)
DE (1) DE602006017589D1 (de)
WO (1) WO2007078939A2 (de)

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US8073892B2 (en) 2005-12-30 2011-12-06 Intel Corporation Cryptographic system, method and multiplier
US9191211B2 (en) * 2009-02-27 2015-11-17 Atmel Corporation Data security system
US20100250965A1 (en) * 2009-03-31 2010-09-30 Olson Christopher H Apparatus and method for implementing instruction support for the advanced encryption standard (aes) algorithm
US20100246815A1 (en) * 2009-03-31 2010-09-30 Olson Christopher H Apparatus and method for implementing instruction support for the kasumi cipher algorithm
US8832464B2 (en) * 2009-03-31 2014-09-09 Oracle America, Inc. Processor and method for implementing instruction support for hash algorithms
US9317286B2 (en) * 2009-03-31 2016-04-19 Oracle America, Inc. Apparatus and method for implementing instruction support for the camellia cipher algorithm
US8654970B2 (en) * 2009-03-31 2014-02-18 Oracle America, Inc. Apparatus and method for implementing instruction support for the data encryption standard (DES) algorithm
US9990201B2 (en) 2009-12-22 2018-06-05 Intel Corporation Multiplication instruction for which execution completes without writing a carry flag
US8892459B2 (en) * 2011-07-25 2014-11-18 BrandVerity Inc. Affiliate investigation system and method
US9251377B2 (en) 2012-12-28 2016-02-02 Intel Corporation Instructions processors, methods, and systems to process secure hash algorithms
US8924741B2 (en) 2012-12-29 2014-12-30 Intel Corporation Instruction and logic to provide SIMD secure hashing round slice functionality
US9207941B2 (en) * 2013-03-15 2015-12-08 Intel Corporation Systems, apparatuses, and methods for reducing the number of short integer multiplications
US10038550B2 (en) 2013-08-08 2018-07-31 Intel Corporation Instruction and logic to provide a secure cipher hash round functionality
US10503510B2 (en) 2013-12-27 2019-12-10 Intel Corporation SM3 hash function message expansion processors, methods, systems, and instructions
US9912481B2 (en) 2014-03-27 2018-03-06 Intel Corporation Method and apparatus for efficiently executing hash operations
US9317719B2 (en) 2014-09-04 2016-04-19 Intel Corporation SM3 hash algorithm acceleration processors, methods, systems, and instructions
CN104239279A (zh) * 2014-09-10 2014-12-24 哈尔滨工业大学深圳研究生院 一种乘法器
US9658854B2 (en) 2014-09-26 2017-05-23 Intel Corporation Instructions and logic to provide SIMD SM3 cryptographic hashing functionality
GB2539881B (en) * 2015-06-24 2018-07-25 Advanced Risc Mach Ltd An apparatus and method for processing floating point values
CN107861709B (zh) * 2017-12-01 2021-04-02 中国兵器装备集团自动化研究所 适应前端高速处理的累加器和功率谱累加器及其累加方法
US10884957B2 (en) * 2018-10-15 2021-01-05 Intel Corporation Pipeline circuit architecture to provide in-memory computation functionality
US20220171604A1 (en) * 2020-12-02 2022-06-02 Flex Logix Technologies, Inc. Multiplier Circuit Array, MAC and MAC Pipeline including Same, and Methods of Configuring Same
WO2022191859A1 (en) * 2021-03-12 2022-09-15 Zeku, Inc. Vector processing using vector-specific data type
CN113946846B (zh) * 2021-10-14 2022-07-12 深圳致星科技有限公司 用于联邦学习和隐私计算的密文计算装置及方法
CN117149129B (zh) * 2023-10-31 2024-01-26 共模半导体技术(苏州)有限公司 专用大整数乘法微控制器

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Also Published As

Publication number Publication date
CN101042639A (zh) 2007-09-26
WO2007078939A3 (en) 2007-11-15
EP1966680A2 (de) 2008-09-10
EP1966680B1 (de) 2010-10-13
US8073892B2 (en) 2011-12-06
ATE484789T1 (de) 2010-10-15
WO2007078939A2 (en) 2007-07-12
CN101149675A (zh) 2008-03-26
US20110264720A1 (en) 2011-10-27

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