DE60219719D1 - Speichermatrix und Herstellungsverfahren - Google Patents

Speichermatrix und Herstellungsverfahren

Info

Publication number
DE60219719D1
DE60219719D1 DE60219719T DE60219719T DE60219719D1 DE 60219719 D1 DE60219719 D1 DE 60219719D1 DE 60219719 T DE60219719 T DE 60219719T DE 60219719 T DE60219719 T DE 60219719T DE 60219719 D1 DE60219719 D1 DE 60219719D1
Authority
DE
Germany
Prior art keywords
manufacturing process
memory matrix
matrix
memory
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60219719T
Other languages
English (en)
Other versions
DE60219719T2 (de
Inventor
Ping Mei
Carl P Taussig
Patricia A Beck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hewlett Packard Development Co LP
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE60219719D1 publication Critical patent/DE60219719D1/de
Application granted granted Critical
Publication of DE60219719T2 publication Critical patent/DE60219719T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components
    • H01L27/1021—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components including diodes only
DE60219719T 2001-06-29 2002-06-20 Speichermatrix und Herstellungsverfahren Expired - Fee Related DE60219719T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/896,480 US6599796B2 (en) 2001-06-29 2001-06-29 Apparatus and fabrication process to reduce crosstalk in pirm memory array
US896480 2001-06-29

Publications (2)

Publication Number Publication Date
DE60219719D1 true DE60219719D1 (de) 2007-06-06
DE60219719T2 DE60219719T2 (de) 2008-01-31

Family

ID=25406289

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60219719T Expired - Fee Related DE60219719T2 (de) 2001-06-29 2002-06-20 Speichermatrix und Herstellungsverfahren

Country Status (7)

Country Link
US (1) US6599796B2 (de)
EP (1) EP1271650B1 (de)
JP (1) JP2003060162A (de)
KR (1) KR20030003106A (de)
CN (1) CN1395312A (de)
DE (1) DE60219719T2 (de)
TW (1) TW546751B (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5673218A (en) 1996-03-05 1997-09-30 Shepard; Daniel R. Dual-addressed rectifier storage device
US6956757B2 (en) * 2000-06-22 2005-10-18 Contour Semiconductor, Inc. Low cost high density rectifier matrix memory
EP1320872A2 (de) * 2000-09-27 2003-06-25 NUP2 Incorporated Herstellung von halbleiterbauelementen
DE10155023B4 (de) * 2001-11-05 2008-11-06 Qimonda Ag Leitungsanordnung für Bitleitungen zur Kontaktierung mindestens einer Speicherzelle und Verfahren zur Herstellung einer Leitungsanordnung für Bitleitungen
US6642603B1 (en) * 2002-06-27 2003-11-04 Matrix Semiconductor, Inc. Same conductivity type highly-doped regions for antifuse memory cell
US6683365B1 (en) * 2002-08-01 2004-01-27 Micron Technology, Inc. Edge intensive antifuse device structure
US6867132B2 (en) * 2002-09-17 2005-03-15 Hewlett-Packard Development Company, L.P. Large line conductive pads for interconnection of stackable circuitry
US20060171200A1 (en) 2004-02-06 2006-08-03 Unity Semiconductor Corporation Memory using mixed valence conductive oxides
US7082052B2 (en) 2004-02-06 2006-07-25 Unity Semiconductor Corporation Multi-resistive state element with reactive metal
US7195950B2 (en) * 2004-07-21 2007-03-27 Hewlett-Packard Development Company, L.P. Forming a plurality of thin-film devices
US7106639B2 (en) * 2004-09-01 2006-09-12 Hewlett-Packard Development Company, L.P. Defect management enabled PIRM and method
US7110278B2 (en) * 2004-09-29 2006-09-19 Intel Corporation Crosspoint memory array utilizing one time programmable antifuse cells
US7321502B2 (en) * 2004-09-30 2008-01-22 Intel Corporation Non volatile data storage through dielectric breakdown
KR100593750B1 (ko) * 2004-11-10 2006-06-28 삼성전자주식회사 이성분계 금속 산화막을 데이터 저장 물질막으로 채택하는교차점 비휘발성 기억소자 및 그 제조방법
US8559209B2 (en) 2011-06-10 2013-10-15 Unity Semiconductor Corporation Array voltage regulating technique to enable data operations on large cross-point memory arrays with resistive memory elements
US8565003B2 (en) 2011-06-28 2013-10-22 Unity Semiconductor Corporation Multilayer cross-point memory array having reduced disturb susceptibility
US20130082232A1 (en) 2011-09-30 2013-04-04 Unity Semiconductor Corporation Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells
US8937292B2 (en) 2011-08-15 2015-01-20 Unity Semiconductor Corporation Vertical cross point arrays for ultra high density memory applications
US8270193B2 (en) 2010-01-29 2012-09-18 Unity Semiconductor Corporation Local bit lines and methods of selecting the same to access memory elements in cross-point arrays
US7473986B2 (en) * 2006-09-22 2009-01-06 Taiwan Semiconductor Manufacturing Co., Ltd. Positive-intrinsic-negative (PIN) diode semiconductor devices and fabrication methods thereof
US7813157B2 (en) * 2007-10-29 2010-10-12 Contour Semiconductor, Inc. Non-linear conductor memory
US20090225621A1 (en) * 2008-03-05 2009-09-10 Shepard Daniel R Split decoder storage array and methods of forming the same
US20090296445A1 (en) * 2008-06-02 2009-12-03 Shepard Daniel R Diode decoder array with non-sequential layout and methods of forming the same
US8586962B2 (en) 2008-10-06 2013-11-19 Samsung Electronics Co., Ltd. Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters
US8105884B2 (en) 2008-10-06 2012-01-31 Samsung Electronics Co., Ltd. Cross point memory arrays, methods of manufacturing the same, masters for imprint processes, and methods of manufacturing masters
US8325556B2 (en) * 2008-10-07 2012-12-04 Contour Semiconductor, Inc. Sequencing decoder circuit
KR101493874B1 (ko) * 2008-11-12 2015-02-16 삼성전자주식회사 비휘발성 메모리 소자
CN101752312B (zh) * 2008-12-03 2012-05-30 中国科学院上海微系统与信息技术研究所 具有双浅沟道隔离槽的高密度二极管阵列的制造方法
US8638584B2 (en) * 2010-02-02 2014-01-28 Unity Semiconductor Corporation Memory architectures and techniques to enhance throughput for cross-point arrays
US10566056B2 (en) 2011-06-10 2020-02-18 Unity Semiconductor Corporation Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations
US9117495B2 (en) 2011-06-10 2015-08-25 Unity Semiconductor Corporation Global bit line pre-charge circuit that compensates for process, operating voltage, and temperature variations
US8891276B2 (en) 2011-06-10 2014-11-18 Unity Semiconductor Corporation Memory array with local bitlines and local-to-global bitline pass gates and gain stages

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL61671A (en) * 1979-12-13 1984-04-30 Energy Conversion Devices Inc Diode and rom or eeprom devices using it
US4419741A (en) * 1980-01-28 1983-12-06 Rca Corporation Read only memory (ROM) having high density memory array with on pitch decoder circuitry
US4423432A (en) * 1980-01-28 1983-12-27 Rca Corporation Apparatus for decoding multiple input lines
US4667189A (en) * 1984-04-25 1987-05-19 Energy Conversion Devices, Inc. Programmable semiconductor switch for a display matrix or the like and method for making same
US5008722A (en) 1986-03-27 1991-04-16 Texas Instruments Incorporated Non-volatile memory
US4698900A (en) 1986-03-27 1987-10-13 Texas Instruments Incorporated Method of making a non-volatile memory having dielectric filled trenches
US4881114A (en) * 1986-05-16 1989-11-14 Actel Corporation Selectively formable vertical diode circuit element
US5227660A (en) * 1987-11-09 1993-07-13 Hitachi, Ltd. Semiconductor device
US5311039A (en) * 1990-04-24 1994-05-10 Seiko Epson Corporation PROM and ROM memory cells
GB9113795D0 (en) * 1991-06-26 1991-08-14 Philips Electronic Associated Thin-film rom devices and their manufacture
US5170243A (en) * 1991-11-04 1992-12-08 International Business Machines Corporation Bit line configuration for semiconductor memory
JP3256603B2 (ja) * 1993-07-05 2002-02-12 株式会社東芝 半導体装置及びその製造方法
US5362665A (en) * 1994-02-14 1994-11-08 Industrial Technology Research Institute Method of making vertical DRAM cross point memory cell
GB9404111D0 (en) * 1994-03-03 1994-04-20 Philips Electronics Uk Ltd A charge storage device
GB9404113D0 (en) * 1994-03-03 1994-04-20 Philips Electronics Uk Ltd A charge storage device
JP3501416B2 (ja) * 1994-04-28 2004-03-02 忠弘 大見 半導体装置
US5903041A (en) * 1994-06-21 1999-05-11 Aptix Corporation Integrated two-terminal fuse-antifuse and fuse and integrated two-terminal fuse-antifuse structures incorporating an air gap
SE9500013D0 (sv) * 1995-01-03 1995-01-03 Abb Research Ltd Semiconductor device having a passivation layer
US5901065A (en) * 1996-02-07 1999-05-04 Motorola, Inc. Apparatus and method for automatically placing ties and connection elements within an integrated circuit
US5736433A (en) * 1996-05-22 1998-04-07 Sgs-Thomson Microelectronics, Inc. Double mask hermetic passivation method providing enhanced resistance to moisture
WO1997047041A2 (en) * 1996-06-05 1997-12-11 Philips Electronics N.V. Programmable, non-volatile memory device, and method of manufacturing such a device
US5835396A (en) * 1996-10-17 1998-11-10 Zhang; Guobiao Three-dimensional read-only memory
US6028324A (en) * 1997-03-07 2000-02-22 Taiwan Semiconductor Manufacturing Company Test structures for monitoring gate oxide defect densities and the plasma antenna effect
US6169686B1 (en) * 1997-11-20 2001-01-02 Hewlett-Packard Company Solid-state memory with magnetic storage cells
US5991193A (en) * 1997-12-02 1999-11-23 International Business Machines Corporation Voltage biasing for magnetic ram with magnetic tunnel memory cells
US6255671B1 (en) * 1998-01-05 2001-07-03 International Business Machines Corporation Metal embedded passivation layer structure for microelectronic interconnect formation, customization and repair
US6174767B1 (en) * 1998-05-11 2001-01-16 Vanguard International Semiconductor Corporation Method of fabrication of capacitor and bit-line at same level for 8F2 DRAM cell with minimum bit-line coupling noise
US6034882A (en) * 1998-11-16 2000-03-07 Matrix Semiconductor, Inc. Vertically stacked field programmable nonvolatile memory and method of fabrication
US6180503B1 (en) * 1999-07-29 2001-01-30 Vanguard International Semiconductor Corporation Passivation layer etching process for memory arrays with fusible links
KR100887275B1 (ko) * 2000-03-23 2009-03-06 크로스 매치 테크놀로지스, 인크. 압전 식별 디바이스 및 그 응용
US6269018B1 (en) * 2000-04-13 2001-07-31 International Business Machines Corporation Magnetic random access memory using current through MTJ write mechanism
US6396121B1 (en) * 2000-05-31 2002-05-28 International Business Machines Corporation Structures and methods of anti-fuse formation in SOI
US6385075B1 (en) * 2001-06-05 2002-05-07 Hewlett-Packard Company Parallel access of cross-point diode memory arrays

Also Published As

Publication number Publication date
EP1271650A2 (de) 2003-01-02
US6599796B2 (en) 2003-07-29
KR20030003106A (ko) 2003-01-09
US20030003633A1 (en) 2003-01-02
JP2003060162A (ja) 2003-02-28
CN1395312A (zh) 2003-02-05
DE60219719T2 (de) 2008-01-31
EP1271650B1 (de) 2007-04-25
TW546751B (en) 2003-08-11
EP1271650A3 (de) 2003-12-03

Similar Documents

Publication Publication Date Title
DE60219719D1 (de) Speichermatrix und Herstellungsverfahren
DE60215571D1 (de) MFOS-Speicher-Transistor und diesbezügliches Herstellungsverfahren
DE60310339D1 (de) Querträger und Herstellungsverfahren
DE60319810D1 (de) Anschwemmfiltermedien und herstellungs- und verwendungsverfahren
DE60136927D1 (de) Rfelektiver bedruckter gegenstand und sein herstellungsverfahren
DE60324888D1 (de) und Herstellungsverfahren
DE60218767D1 (de) Reissverschluss und Herstellungsverfahren
DE60225214D1 (de) Authentisches Dokument und dessen Herstellungsverfahren
DE60112988D1 (de) Kabelbaum und Herstellungsverfahren
DE60235142D1 (de) Kondensator und dessen Herstellungsverfahren
DE60226928D1 (de) Polyhydroxyalkanoat-enthaltende Struktur und Herstellungsverfahren hierfür
DE60037057D1 (de) Halbleiterelement und Herstellungsverfahren dafür
DE60023103D1 (de) Lüfter und dessen Herstellungverfahren
DE60228061D1 (de) Maschenware mit öffnung und herstellungsverfahren
DE60223735D1 (de) Interferometer und zugehöriges Herstellungsverfahren
DE60225763D1 (de) Trockentoner und Herstellungsverfahren
DE60020737D1 (de) Sic-einkristall und herstellungsverfahren dafür
DE60317156D1 (de) Aktuator und dessen Herstellungsverfahren
DE60231538D1 (de) Sputtertarget und herstellungsverfahren dafür
DE60210535D1 (de) Vibrator und Herstellungsverfahren desselben
DE60206957D1 (de) Vliesstoff und herstellungsverfahren
DE10196531T1 (de) Beschleunigungssensor und Herstellungsverfahren dafür
DE60038110D1 (de) Dämpfer und herstellungsmethode dafür
DE60034186D1 (de) Thermokopf und herstellungsverfahren
DE50214244D1 (de) Klauenpolläufer und dessen herstellverfahren

Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, US

8381 Inventor (new situation)

Inventor name: MEI, PING, DD PALO ALTO, CA 94306, US

Inventor name: TAUSSIG, CARL P., REDWOOD CITY, CA 94061, US

Inventor name: BECK, PATRICIA A., PALO ALTO, CA 94304, US

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee