DE60228597D1 - Frequenzsynthesizer mit gebrochenem Teilverhältnis und kompensierter Verzögerung - Google Patents

Frequenzsynthesizer mit gebrochenem Teilverhältnis und kompensierter Verzögerung

Info

Publication number
DE60228597D1
DE60228597D1 DE60228597T DE60228597T DE60228597D1 DE 60228597 D1 DE60228597 D1 DE 60228597D1 DE 60228597 T DE60228597 T DE 60228597T DE 60228597 T DE60228597 T DE 60228597T DE 60228597 D1 DE60228597 D1 DE 60228597D1
Authority
DE
Germany
Prior art keywords
frequency synthesizer
fractional part
part ratio
compensated delay
compensated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60228597T
Other languages
English (en)
Inventor
Jan Frans Lucien Craninckx
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ST Ericsson Belgium N V
Original Assignee
STMicroelectronics Belgium NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Belgium NV filed Critical STMicroelectronics Belgium NV
Application granted granted Critical
Publication of DE60228597D1 publication Critical patent/DE60228597D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0893—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
DE60228597T 2002-12-23 2002-12-23 Frequenzsynthesizer mit gebrochenem Teilverhältnis und kompensierter Verzögerung Expired - Lifetime DE60228597D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02447268A EP1434352B1 (de) 2002-12-23 2002-12-23 Frequenzsynthesizer mit gebrochenem Teilverhältnis und kompensierter Verzögerung

Publications (1)

Publication Number Publication Date
DE60228597D1 true DE60228597D1 (de) 2008-10-09

Family

ID=32405844

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60228597T Expired - Lifetime DE60228597D1 (de) 2002-12-23 2002-12-23 Frequenzsynthesizer mit gebrochenem Teilverhältnis und kompensierter Verzögerung

Country Status (3)

Country Link
US (1) US6943600B2 (de)
EP (1) EP1434352B1 (de)
DE (1) DE60228597D1 (de)

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US7171170B2 (en) 2001-07-23 2007-01-30 Sequoia Communications Envelope limiting for polar modulators
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US7489916B1 (en) 2002-06-04 2009-02-10 Sequoia Communications Direct down-conversion mixer architecture
US7496338B1 (en) 2003-12-29 2009-02-24 Sequoia Communications Multi-segment gain control system
US7609118B1 (en) * 2003-12-29 2009-10-27 Sequoia Communications Phase-locked loop calibration system
US7242224B1 (en) 2004-02-20 2007-07-10 Marvell International Ltd. Continuous, wide-range frequency synthesis and phase tracking methods and apparatus
US7522017B1 (en) 2004-04-21 2009-04-21 Sequoia Communications High-Q integrated RF filters
US7672648B1 (en) 2004-06-26 2010-03-02 Quintics Holdings System for linear amplitude modulation
FR2879858B1 (fr) * 2004-12-16 2007-03-30 St Microelectronics Sa Procede de correction du dephasage entre deux signaux d'enree d'une boucle a verrouillage de phase et dispositif associe
US7479815B1 (en) 2005-03-01 2009-01-20 Sequoia Communications PLL with dual edge sensitivity
US7548122B1 (en) 2005-03-01 2009-06-16 Sequoia Communications PLL with switched parameters
US7675379B1 (en) 2005-03-05 2010-03-09 Quintics Holdings Linear wideband phase modulation system
US7880516B2 (en) 2005-03-31 2011-02-01 Freescale Semiconductor, Inc. Method for noise reduction in a phase locked loop and a device having noise reduction capabilities
US7595626B1 (en) 2005-05-05 2009-09-29 Sequoia Communications System for matched and isolated references
DE102005060470A1 (de) * 2005-12-17 2007-06-21 Atmel Germany Gmbh PLL-Frequenzgenerator
US20070205200A1 (en) * 2006-03-02 2007-09-06 Brain Box Concepts Soap bar holder and method of supporting a soap bar
WO2007137094A2 (en) 2006-05-16 2007-11-29 Sequoia Communications A multi-mode vco for direct fm systems
US7522005B1 (en) 2006-07-28 2009-04-21 Sequoia Communications KFM frequency tracking system using an analog correlator
US7679468B1 (en) 2006-07-28 2010-03-16 Quintic Holdings KFM frequency tracking system using a digital correlator
US7894545B1 (en) 2006-08-14 2011-02-22 Quintic Holdings Time alignment of polar transmitter
US7920033B1 (en) 2006-09-28 2011-04-05 Groe John B Systems and methods for frequency modulation adjustment
KR100869227B1 (ko) 2007-04-04 2008-11-18 삼성전자주식회사 프리 캘리브레이션 모드를 가진 위상동기루프 회로 및위상동기루프 회로의 프리 캘리브레이션 방법
US7969252B2 (en) * 2007-12-17 2011-06-28 Micron Technology, Inc. System and method for reducing lock time in a phase-locked loop
JP2009171140A (ja) * 2008-01-15 2009-07-30 Fujitsu Ltd 位相同期発振器
US8816780B2 (en) * 2010-07-27 2014-08-26 Mediatek Inc. Apparatus and method for calibrating timing mismatch of edge rotator operating on multiple phases of oscillator
US8493107B2 (en) * 2010-07-27 2013-07-23 Mediatek Inc. Clock generator for generating output clock having non-harmonic relationship with input clock and related clock generating method thereof
US8497716B2 (en) * 2011-08-05 2013-07-30 Qualcomm Incorporated Phase locked loop with phase correction in the feedback loop
DE102013101933A1 (de) * 2013-02-27 2014-08-28 Technische Universität Dresden Verfahren und Anordnung zur Erzeugung eines Taktsignals mittels eines Phasenregelkreises
DE102013114367B4 (de) 2013-12-18 2017-02-02 Intel IP Corporation Eine Schaltung, ein Verfahren und ein Synthesizer für das Generieren eines synthetisierten Signals mit einer wählbaren Frequenz
EP2983294B1 (de) * 2014-08-07 2019-07-03 Nxp B.V. HF-Schaltung
US10050634B1 (en) 2017-02-10 2018-08-14 Apple Inc. Quantization noise cancellation for fractional-N phased-locked loop
US10090845B1 (en) * 2017-03-28 2018-10-02 Stmicroelectronics International N.V. Fraction-N digital PLL capable of canceling quantization noise from sigma-delta modulator
CN112118008B (zh) * 2019-06-20 2024-02-20 瑞昱半导体股份有限公司 锁相环电路

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US33201A (en) * 1861-09-03 Improvement in flood-gates
JPS56169927A (en) * 1980-06-03 1981-12-26 Japan Radio Co Ltd Frequency synthesizer
GB8512912D0 (en) * 1985-05-22 1985-06-26 Plessey Co Plc Phase modulators
US5880612A (en) * 1996-10-17 1999-03-09 Samsung Electronics Co., Ltd. Signal de-skewing using programmable dual delay-locked loop
US6094082A (en) * 1998-05-18 2000-07-25 National Semiconductor Corporation DLL calibrated switched current delay interpolator
US6064272A (en) * 1998-07-01 2000-05-16 Conexant Systems, Inc. Phase interpolated fractional-N frequency synthesizer with on-chip tuning
DE19840241C1 (de) * 1998-09-03 2000-03-23 Siemens Ag Digitaler PLL (Phase Locked Loop)-Frequenzsynthesizer
DE60112632T2 (de) * 2000-03-10 2006-06-14 Koninkl Philips Electronics Nv Phasenverriegelungsschleife
KR100317679B1 (ko) * 2000-03-22 2001-12-24 조정남 링 발진기 출력파형간의 위상 오프셋을 보정하기 위한자기 보정회로 및 방법
JP3808338B2 (ja) * 2001-08-30 2006-08-09 株式会社ルネサステクノロジ 位相同期回路
US6882831B2 (en) * 2001-12-07 2005-04-19 Broadcom Corporation Translational loop transmitter architecture employing channel power ratio measurements for modulation accuracy calibration
US6693496B1 (en) * 2002-03-13 2004-02-17 Genesis Microchip Inc. Method and system for low power, low jitter, wide range, self-adaptive multi-frequency phase locked loop
US6788045B2 (en) * 2002-05-17 2004-09-07 Sun Microsystems, Inc. Method and apparatus for calibrating a delay locked loop charge pump current

Also Published As

Publication number Publication date
EP1434352A1 (de) 2004-06-30
US20040196108A1 (en) 2004-10-07
EP1434352B1 (de) 2008-08-27
US6943600B2 (en) 2005-09-13

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