DE60228861D1 - Verfahren und vorrichtung zur einplanung von anforderungen unter verwendung geordneter stufen von einplanungskriterien - Google Patents

Verfahren und vorrichtung zur einplanung von anforderungen unter verwendung geordneter stufen von einplanungskriterien

Info

Publication number
DE60228861D1
DE60228861D1 DE60228861T DE60228861T DE60228861D1 DE 60228861 D1 DE60228861 D1 DE 60228861D1 DE 60228861 T DE60228861 T DE 60228861T DE 60228861 T DE60228861 T DE 60228861T DE 60228861 D1 DE60228861 D1 DE 60228861D1
Authority
DE
Germany
Prior art keywords
planning
criteria
requirements
regional levels
scheduling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60228861T
Other languages
English (en)
Inventor
Wolf-Dietrich Weber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sonics Inc
Original Assignee
Sonics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sonics Inc filed Critical Sonics Inc
Application granted granted Critical
Publication of DE60228861D1 publication Critical patent/DE60228861D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1626Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
DE60228861T 2001-10-12 2002-02-21 Verfahren und vorrichtung zur einplanung von anforderungen unter verwendung geordneter stufen von einplanungskriterien Expired - Lifetime DE60228861D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/977,517 US6578117B2 (en) 2001-10-12 2001-10-12 Method and apparatus for scheduling requests using ordered stages of scheduling criteria
PCT/US2002/005287 WO2003040934A1 (en) 2001-10-12 2002-02-21 Method and apparatus for scheduling requests using ordered stages of scheduling criteria

Publications (1)

Publication Number Publication Date
DE60228861D1 true DE60228861D1 (de) 2008-10-23

Family

ID=25525217

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60228861T Expired - Lifetime DE60228861D1 (de) 2001-10-12 2002-02-21 Verfahren und vorrichtung zur einplanung von anforderungen unter verwendung geordneter stufen von einplanungskriterien

Country Status (6)

Country Link
US (2) US6578117B2 (de)
EP (1) EP1435044B1 (de)
JP (1) JP4094550B2 (de)
AT (1) ATE408190T1 (de)
DE (1) DE60228861D1 (de)
WO (1) WO2003040934A1 (de)

Families Citing this family (69)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7325221B1 (en) 2000-08-08 2008-01-29 Sonics, Incorporated Logic system with configurable interface
US7165094B2 (en) * 2001-03-09 2007-01-16 Sonics, Inc. Communications system and method with non-blocking shared interface
US6934823B2 (en) * 2001-03-29 2005-08-23 Intel Corporation Method and apparatus for handling memory read return data from different time domains
US20030004699A1 (en) * 2001-06-04 2003-01-02 Choi Charles Y. Method and apparatus for evaluating an integrated circuit model
US7194561B2 (en) 2001-10-12 2007-03-20 Sonics, Inc. Method and apparatus for scheduling requests to a resource using a configurable threshold
US6804738B2 (en) * 2001-10-12 2004-10-12 Sonics, Inc. Method and apparatus for scheduling a resource to meet quality-of-service restrictions
US7254603B2 (en) * 2002-05-03 2007-08-07 Sonics, Inc. On-chip inter-network performance optimization using configurable performance parameters
US7356633B2 (en) * 2002-05-03 2008-04-08 Sonics, Inc. Composing on-chip interconnects with configurable interfaces
US7194566B2 (en) * 2002-05-03 2007-03-20 Sonics, Inc. Communication system and method with configurable posting points
US7302691B2 (en) * 2002-05-10 2007-11-27 Sonics, Incorporated Scalable low bandwidth multicast handling in mixed core systems
US6779092B2 (en) * 2002-05-15 2004-08-17 Hewlett-Packard Development Company, L.P. Reordering requests for access to subdivided resource
US6976106B2 (en) * 2002-11-01 2005-12-13 Sonics, Inc. Method and apparatus for speculative response arbitration to improve system latency
US7266786B2 (en) 2002-11-05 2007-09-04 Sonics, Inc. Method and apparatus for configurable address mapping and protection architecture and hardware for on-chip systems
US7603441B2 (en) * 2002-12-27 2009-10-13 Sonics, Inc. Method and apparatus for automatic configuration of multiple on-chip interconnects
JP4041002B2 (ja) * 2003-03-24 2008-01-30 株式会社三菱東京Ufj銀行 データベース更新処理システム、データベース更新のための更新データ入力方法、更新データ処理方法、およびプログラム
US7149829B2 (en) * 2003-04-18 2006-12-12 Sonics, Inc. Various methods and apparatuses for arbitration among blocks of functionality
US20040210696A1 (en) * 2003-04-18 2004-10-21 Meyer Michael J. Method and apparatus for round robin resource arbitration
US7296105B2 (en) * 2003-10-03 2007-11-13 Sonics, Inc. Method and apparatus for configuring an interconnect to implement arbitration
US9087036B1 (en) 2004-08-12 2015-07-21 Sonics, Inc. Methods and apparatuses for time annotated transaction level modeling
US8504992B2 (en) * 2003-10-31 2013-08-06 Sonics, Inc. Method and apparatus for establishing a quality of service model
US7665069B2 (en) * 2003-10-31 2010-02-16 Sonics, Inc. Method and apparatus for establishing a quality of service model
US7739436B2 (en) * 2004-11-01 2010-06-15 Sonics, Inc. Method and apparatus for round robin resource arbitration with a fast request to grant response
US7681196B2 (en) * 2004-11-18 2010-03-16 Oracle International Corporation Providing optimal number of threads to applications performing multi-tasking using threads
US7356631B2 (en) * 2005-01-21 2008-04-08 Himax Technologies, Inc. Apparatus and method for scheduling requests to source device in a memory access system
KR100784385B1 (ko) * 2005-08-10 2007-12-11 삼성전자주식회사 공유 자원에 대한 접근 요청을 중재하는 시스템 및 방법
US8868397B2 (en) * 2006-11-20 2014-10-21 Sonics, Inc. Transaction co-validation across abstraction layers
KR101382393B1 (ko) * 2007-01-16 2014-04-09 삼성전자주식회사 서버 및 그의 동시접속 제어 방법
US8327057B1 (en) 2007-04-16 2012-12-04 Juniper Networks, Inc. Ordering write bursts to memory
US7814243B2 (en) * 2007-06-01 2010-10-12 Sonics, Inc. Shared storage for multi-threaded ordered queues in an interconnect
US9292436B2 (en) * 2007-06-25 2016-03-22 Sonics, Inc. Various methods and apparatus to support transactions whose data address sequence within that transaction crosses an interleaved channel address boundary
US8438320B2 (en) * 2007-06-25 2013-05-07 Sonics, Inc. Various methods and apparatus for address tiling and channel interleaving throughout the integrated system
US8108648B2 (en) * 2007-06-25 2012-01-31 Sonics, Inc. Various methods and apparatus for address tiling
US9588810B2 (en) * 2007-08-08 2017-03-07 Microsoft Technology Licensing, Llc Parallelism-aware memory request scheduling in shared memory controllers
US8229723B2 (en) * 2007-12-07 2012-07-24 Sonics, Inc. Performance software instrumentation and analysis for electronic design automation
TWI337517B (en) * 2008-03-04 2011-02-11 Inventec Corp Trace carrier
US8073820B2 (en) 2008-04-07 2011-12-06 Sonics, Inc. Method and system for a database to monitor and analyze performance of an electronic design
US8032329B2 (en) * 2008-09-04 2011-10-04 Sonics, Inc. Method and system to monitor, debug, and analyze performance of an electronic design
US8190804B1 (en) * 2009-03-12 2012-05-29 Sonics, Inc. Various methods and apparatus for a memory scheduler with an arbiter
US8607234B2 (en) * 2009-07-22 2013-12-10 Empire Technology Development, Llc Batch scheduling with thread segregation and per thread type marking caps
US8799912B2 (en) * 2009-07-22 2014-08-05 Empire Technology Development Llc Application selection of memory request scheduling
US8839255B2 (en) * 2009-07-23 2014-09-16 Empire Technology Development Llc Scheduling of threads by batch scheduling
US20110213949A1 (en) * 2010-03-01 2011-09-01 Sonics, Inc. Methods and apparatus for optimizing concurrency in multiple core systems
US8972995B2 (en) 2010-08-06 2015-03-03 Sonics, Inc. Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads
US8601288B2 (en) 2010-08-31 2013-12-03 Sonics, Inc. Intelligent power controller
US8631213B2 (en) 2010-09-16 2014-01-14 Apple Inc. Dynamic QoS upgrading
US8314807B2 (en) 2010-09-16 2012-11-20 Apple Inc. Memory controller with QoS-aware scheduling
US8438306B2 (en) 2010-11-02 2013-05-07 Sonics, Inc. Apparatus and methods for on layer concurrency in an integrated circuit
US9405700B2 (en) 2010-11-04 2016-08-02 Sonics, Inc. Methods and apparatus for virtualization in an integrated circuit
US10162726B2 (en) * 2011-01-18 2018-12-25 Accenture Global Services Limited Managing computing resources
US8848731B2 (en) 2011-01-31 2014-09-30 Qualcomm Incorporated System and method for facilitating data transfer using a shared non-deterministic bus
US8775754B2 (en) * 2011-06-24 2014-07-08 Arm Limited Memory controller and method of selecting a transaction using a plurality of ordered lists
US8798038B2 (en) 2011-08-26 2014-08-05 Sonics, Inc. Efficient header generation in packetized protocols for flexible system on chip architectures
US8711867B2 (en) 2011-08-26 2014-04-29 Sonics, Inc. Credit flow control scheme in a router with flexible link widths utilizing minimal storage
US8868941B2 (en) 2011-09-19 2014-10-21 Sonics, Inc. Apparatus and methods for an interconnect power manager
KR101292309B1 (ko) * 2011-12-27 2013-07-31 숭실대학교산학협력단 반도체칩 및 메모리 제어방법, 그리고 그 방법을 컴퓨터에서 실행시키기 위한 프로그램을 기록한 기록매체
US8793697B2 (en) 2012-02-23 2014-07-29 Qualcomm Incorporated Method and system for scheduling requests in a portable computing device
US9910454B2 (en) 2012-06-07 2018-03-06 Sonics, Inc. Synchronizer with a timing closure enhancement
US9053058B2 (en) 2012-12-20 2015-06-09 Apple Inc. QoS inband upgrade
US9229896B2 (en) 2012-12-21 2016-01-05 Apple Inc. Systems and methods for maintaining an order of read and write transactions in a computing system
US8963938B2 (en) 2013-01-18 2015-02-24 Apple Inc. Modified quality of service (QoS) thresholds
US9684633B2 (en) 2013-01-24 2017-06-20 Samsung Electronics Co., Ltd. Adaptive service controller, system on chip and method of controlling the same
US9019291B2 (en) 2013-02-25 2015-04-28 Apple Inc. Multiple quality of service (QoS) thresholds or clock gating thresholds based on memory stress level
WO2015100614A1 (en) 2013-12-31 2015-07-09 Thomson Licensing User-centered task scheduling for multi-screen viewing in cloud computing environment
US9472169B2 (en) 2014-04-22 2016-10-18 Apple Inc. Coordinate based QoS escalation
JP6356624B2 (ja) * 2015-03-23 2018-07-11 東芝メモリ株式会社 メモリデバイスおよび情報処理装置
US10152112B2 (en) 2015-06-10 2018-12-11 Sonics, Inc. Power manager with a power switch arbitrator
US10275352B1 (en) * 2017-12-28 2019-04-30 Advanced Micro Devices, Inc. Supporting responses for memory types with non-uniform latencies on same channel
JP7292044B2 (ja) * 2019-02-07 2023-06-16 キヤノン株式会社 制御装置および制御方法
GB2588618B (en) * 2019-10-29 2022-04-20 Advanced Risc Mach Ltd Methods and apparatus for issuing memory access commands

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274769A (en) 1988-08-29 1993-12-28 Fujitsu Limited System for transferring data between blocks
US5287464A (en) 1990-10-24 1994-02-15 Zilog, Inc. Semiconductor multi-device system with logic means for controlling the operational mode of a set of input/output data bus drivers
JP2575557B2 (ja) 1990-11-13 1997-01-29 インターナショナル・ビジネス・マシーンズ・コーポレイション スーパーコンピユータシステム
US5218456A (en) 1991-07-22 1993-06-08 Xerox Corporation Disk bandwidth allocations to prioritize disk requests
US5530901A (en) 1991-11-28 1996-06-25 Ricoh Company, Ltd. Data Transmission processing system having DMA channels running cyclically to execute data transmission from host to memory and from memory to processing unit successively
JP2531903B2 (ja) 1992-06-22 1996-09-04 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピュ―タ・システムおよびシステム拡張装置
US5664153A (en) 1993-04-21 1997-09-02 Intel Corporation Page open/close scheme based on high order address bit and likelihood of page access
US5469473A (en) 1994-04-15 1995-11-21 Texas Instruments Incorporated Transceiver circuit with transition detection
SE515901C2 (sv) 1995-12-28 2001-10-22 Dynarc Ab Resursadministrering, plan och arrangemang
US5809538A (en) 1996-02-07 1998-09-15 General Instrument Corporation DRAM arbiter for video decoder
US5912872A (en) * 1996-09-27 1999-06-15 Digital Optics Corporation Integrated optical apparatus providing separated beams on a detector and associated methods
US5926649A (en) * 1996-10-23 1999-07-20 Industrial Technology Research Institute Media server for storage and retrieval of voluminous multimedia data
US5996037A (en) 1997-06-03 1999-11-30 Lsi Logic Corporation System and method for arbitrating multi-function access to a system bus
GB2326065B (en) 1997-06-05 2002-05-29 Mentor Graphics Corp A scalable processor independent on-chip bus
US6092137A (en) 1997-11-26 2000-07-18 Industrial Technology Research Institute Fair data bus arbitration system which assigns adjustable priority values to competing sources
US6023720A (en) * 1998-02-09 2000-02-08 Matsushita Electric Industrial Co., Ltd. Simultaneous processing of read and write requests using optimized storage partitions for read and write request deadlines
WO2000003516A1 (en) 1998-07-08 2000-01-20 Broadcom Corporation Network switching architecture with multiple table synchronization, and forwarding of both ip and ipx packets
US6266718B1 (en) * 1998-10-14 2001-07-24 Micron Technology, Inc. Apparatus for controlling data transfer operations between a memory and devices having respective latencies
US6363445B1 (en) 1998-10-15 2002-03-26 Micron Technology, Inc. Method of bus arbitration using requesting device bandwidth and priority ranking
US6167445A (en) * 1998-10-26 2000-12-26 Cisco Technology, Inc. Method and apparatus for defining and implementing high-level quality of service policies in computer networks
US6212611B1 (en) * 1998-11-03 2001-04-03 Intel Corporation Method and apparatus for providing a pipelined memory controller
US6195724B1 (en) * 1998-11-16 2001-02-27 Infineon Technologies Ag Methods and apparatus for prioritization of access to external devices
US6253269B1 (en) 1998-12-22 2001-06-26 3Com Corporation Bus arbiter system and method for managing communication buses
JP2004500667A (ja) * 2000-04-03 2004-01-08 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 改良されたメモリリクエスト調停機構を有するメモリコントローラを含むバスブリッジ
US6330225B1 (en) * 2000-05-26 2001-12-11 Sonics, Inc. Communication system and method for different quality of service guarantees for different data flows

Also Published As

Publication number Publication date
ATE408190T1 (de) 2008-09-15
US6804757B2 (en) 2004-10-12
EP1435044B1 (de) 2008-09-10
JP4094550B2 (ja) 2008-06-04
US20030191907A1 (en) 2003-10-09
WO2003040934A1 (en) 2003-05-15
US20030074520A1 (en) 2003-04-17
EP1435044A1 (de) 2004-07-07
JP2005517228A (ja) 2005-06-09
US6578117B2 (en) 2003-06-10
EP1435044A4 (de) 2006-06-28

Similar Documents

Publication Publication Date Title
DE60228861D1 (de) Verfahren und vorrichtung zur einplanung von anforderungen unter verwendung geordneter stufen von einplanungskriterien
DE60223394D1 (de) Verfaren und vorrichtung zum einteilen von anforderungen für einen dynamischen direktzugriffsspeicherbaustein
ATE465446T1 (de) Verfahren und vorrichtungen zur thread-verwaltung von mehrfach-threads
ATE336842T1 (de) Verfahren und vorrichtung zur prioritäts- basierten flusskontrolle in einer ethernet- architektur
ATE460820T1 (de) Verfahren und vorrichtung zur ablaufsteuerung von datenübertragungen in einem drahtlosen kommunikationssystem
DE69831857D1 (de) Verfahren und Vorrichtung zum Zeitplanen von Prozessen für Betriebsmittelzuteilung
DE60317705D1 (de) Verfahren und system zur cluster-verwaltung von netzwerkeinrichtungen
DE60229581D1 (de) System und Verfahren zur kompetenzbasierten Anrufverteilung in einer Anrufzentrale
DE60228193D1 (de) Ressourcensteuerungssystem, Ressourcensteuerungsverfahren, und Basisstation zur Verwendung damit
DE60233858D1 (de) Übertragungsverfahren und -vorrichtung zur Zuteilung von Gerätsidentifikatoren
ATE409904T1 (de) Betriebssysteme
DE69925625D1 (de) Verfahren und vorrichtung zum vorhersagen von menschlichen kognitiven leistung
ATE387663T1 (de) Verfahren und vorichtungen zur erzielung der thermischen verwaltung unter verwendung von verarbeitungs-task-einteilung
ATE491987T1 (de) Verfahren und vorrichtung zur erzeugung von zusammengesetzen benutzeroberflächen
ATE491297T1 (de) System und verfahren zur integrierter lastverteilung und betriebsmittelverwaltung in einer internet-umgebung
ATE396571T1 (de) Verfahren und vorrichtung für einen computerfirewall
DE60238604D1 (de) Verfahren und vorrichtung zur kommunikationsbandbreitenzuteilung
ATE302515T1 (de) Verfahren zur plannung von packetdatenübertragung und paketablaufsteuerung
DE50305133D1 (de) Vorrichtung und verfahren zur durchführung von immunologischen markierungstechniken für gewebedünnschnitte
ATE308128T1 (de) Vorrichtung und verfahren zur zeitweiligen deaktivierung von teilnehmerinformationen
DE60032596D1 (de) System und methode für die einstellung der betriebsart einer elektronischen einheit
DE60332450D1 (de) Vorrichtung und verfahren zur verwaltung von betriebssystemparametern
ATE425610T1 (de) Verfahren und gerät zur zuweisung von zugriffsmechanismen
DE60131143D1 (de) Dehiszenzgen und verfahren zur regulierung von dehiszenz
DE602004017678D1 (de) Vorrichtung zur Verwaltung von Ressourcen

Legal Events

Date Code Title Description
8364 No opposition during term of opposition