DE60229894D1 - Delta-Sigma Modulatorsystem und Verfahren - Google Patents

Delta-Sigma Modulatorsystem und Verfahren

Info

Publication number
DE60229894D1
DE60229894D1 DE60229894T DE60229894T DE60229894D1 DE 60229894 D1 DE60229894 D1 DE 60229894D1 DE 60229894 T DE60229894 T DE 60229894T DE 60229894 T DE60229894 T DE 60229894T DE 60229894 D1 DE60229894 D1 DE 60229894D1
Authority
DE
Germany
Prior art keywords
modulator
sigma modulator
delta sigma
modulator system
delta
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60229894T
Other languages
English (en)
Inventor
Jerry Thomas Bolton Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zoran Corp
Original Assignee
Microtune Texas LP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microtune Texas LP filed Critical Microtune Texas LP
Application granted granted Critical
Publication of DE60229894D1 publication Critical patent/DE60229894D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3006Compensating for, or preventing of, undesired influence of physical parameters
    • H03M7/3008Compensating for, or preventing of, undesired influence of physical parameters by averaging out the errors, e.g. using dither
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/50Digital/analogue converters using delta-sigma modulation as an intermediate step
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/302Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3022Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type
DE60229894T 2001-01-09 2002-01-08 Delta-Sigma Modulatorsystem und Verfahren Expired - Lifetime DE60229894D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/757,798 US6920182B2 (en) 2001-01-09 2001-01-09 Delta-sigma modulator system and method

Publications (1)

Publication Number Publication Date
DE60229894D1 true DE60229894D1 (de) 2009-01-02

Family

ID=25049261

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60229894T Expired - Lifetime DE60229894D1 (de) 2001-01-09 2002-01-08 Delta-Sigma Modulatorsystem und Verfahren

Country Status (4)

Country Link
US (1) US6920182B2 (de)
EP (1) EP1225700B1 (de)
AT (1) ATE415014T1 (de)
DE (1) DE60229894D1 (de)

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US7024171B2 (en) * 2003-02-25 2006-04-04 Icom America, Incorporated Fractional-N frequency synthesizer with cascaded sigma-delta converters
US7561635B2 (en) * 2003-08-05 2009-07-14 Stmicroelectronics Nv Variable coder apparatus for resonant power conversion and method
WO2005074139A2 (en) * 2004-01-28 2005-08-11 Koninklijke Philips Electronics N.V. A da-converter system and a method for converting a multi-bit digital signal to an analog signal
US7706495B2 (en) * 2004-03-12 2010-04-27 Panasonic Corporation Two-point frequency modulation apparatus
ATE398360T1 (de) * 2004-04-02 2008-07-15 Kaben Wireless Silicon Inc Delta-sigma-modulator mit mehreren filtern
JP4327666B2 (ja) * 2004-06-23 2009-09-09 株式会社ルネサステクノロジ 無線送信回路及びそれを用いた送受信機
WO2006085605A1 (ja) * 2005-02-10 2006-08-17 National University Corporation Nagoya University Δς型モジュレータ及びδς型アナログ-デジタル変換回路
US7142144B1 (en) * 2005-05-19 2006-11-28 Ami Semiconductor, Inc. Low power sigma delta modulator
US20070050437A1 (en) * 2005-08-25 2007-03-01 Texas Instruments Incorporated Systems and methods for random value generation
JP3914257B1 (ja) * 2006-10-10 2007-05-16 株式会社アドバンテスト シグマデルタ変調器およびフラクショナル周波数シンセサイザ
US7720160B1 (en) * 2006-12-14 2010-05-18 Maxim Integrated Products, Inc. Phase noise shaping using sigma delta modulation in a timing recovery unit
US7626525B2 (en) * 2007-05-03 2009-12-01 Texas Instruments Incorporated Feed-forward circuitry and corresponding error cancellation circuit for cascaded delta-sigma modulator
US7522079B1 (en) * 2007-09-06 2009-04-21 National Semiconductor Corporation Sigma-delta modulator with DAC resolution less than ADC resolution and increased tolerance of non-ideal integrators
US7450047B1 (en) * 2007-09-06 2008-11-11 National Semiconductor Corporation Sigma-delta modulator with DAC resolution less than ADC resolution and increased dynamic range
US7564391B2 (en) * 2007-11-28 2009-07-21 Texas Instruments Incorporated Sigma delta modulator summing input, reference voltage, and feedback
US8270335B1 (en) * 2008-02-28 2012-09-18 Xilinx, Inc. Arbitration for time division multiple access using delta sigma modulation
KR101565967B1 (ko) * 2008-04-21 2015-11-06 삼성전자주식회사 시그마-델타 아날로그-디지털 변환 방법과 그 장치
US7782239B2 (en) * 2008-10-28 2010-08-24 Robert Bosch Gmbh Multi-stage resettable sigma-delta converters
US7812755B2 (en) * 2008-11-06 2010-10-12 Raytheon Company Signal processor with analog residue
US8169351B2 (en) * 2009-10-23 2012-05-01 Qualcomm Incorporated Feedback circuits with DC offset cancellation
JPWO2012032690A1 (ja) * 2010-09-07 2013-12-12 パナソニック株式会社 デルタシグマ変調器、積分器、および無線通信装置
US9106197B2 (en) * 2012-08-10 2015-08-11 Broadcom Corporation Systems and methods to suppress noise and idle tones
US9225349B2 (en) 2013-08-20 2015-12-29 Skyworks Solutions, Inc. Dither-less multi-stage noise shaping fractional-N frequency synthesizer systems and methods
US9136865B2 (en) 2014-02-11 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-stage digital-to-analog converter
US11010136B2 (en) * 2018-02-08 2021-05-18 Novatek Microelectronics Corp. Random bit stream generator and method thereof
US10211848B1 (en) 2018-03-27 2019-02-19 Synaptics Incorporated Delta sigma modulator systems and methods
EP3553952B1 (de) * 2018-04-10 2023-09-13 Melexis Technologies SA Analog/digital-umsetzer
US10666286B1 (en) * 2019-01-31 2020-05-26 Avago Technologies International Sales Pte. Limited Partitioned delta-sigma modulator for high-speed applications
CN110417415B (zh) * 2019-07-04 2022-12-13 东南大学 一种误差自消除的mash δς调制器
US11121718B1 (en) * 2020-08-12 2021-09-14 Analog Devices International Unlimited Company Multi-stage sigma-delta analog-to-digital converter with dither
US11621722B2 (en) 2021-08-27 2023-04-04 Analog Devices, Inc. Multi quantizer loops for delta-sigma converters

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US5196850A (en) * 1991-11-13 1993-03-23 Crystal Semiconductor Fourth order digital delta-sigma modulator
US5414424A (en) * 1993-08-26 1995-05-09 Advanced Micro Devices, Inc. Fourth-order cascaded sigma-delta modulator
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US5760722A (en) * 1995-01-31 1998-06-02 The United States Of America As Represented By The Secretary Of The Navy Distributed quantization noise transmission zeros in cascaded sigma-delta modulators
GB9622728D0 (en) 1996-10-31 1997-01-08 Discovision Ass Timing synchronization in a reciever employing orthogonal frequency division mutiplexing
DE69818327T2 (de) * 1997-03-05 2004-07-01 Nec Corp. Direktmischempfänger zur Unterdrückung von Offset-Gleichspannungen
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ATE259999T1 (de) 1999-08-31 2004-03-15 Broadcom Corp Speicher ausführung von register-exchange traceback für gigabit ethernet sender-empfänger
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JP4530119B2 (ja) * 2001-06-08 2010-08-25 ルネサスエレクトロニクス株式会社 ディジタルδςモジュレータおよびそれを用いたd/aコンバータ
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Also Published As

Publication number Publication date
EP1225700A2 (de) 2002-07-24
EP1225700A3 (de) 2004-03-17
US6920182B2 (en) 2005-07-19
US20020121994A1 (en) 2002-09-05
ATE415014T1 (de) 2008-12-15
EP1225700B1 (de) 2008-11-19

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