DE60301420D1 - Prüfer für verteilte 4-bits diagonal verschachtelte Parität (DIP4) - Google Patents

Prüfer für verteilte 4-bits diagonal verschachtelte Parität (DIP4)

Info

Publication number
DE60301420D1
DE60301420D1 DE60301420T DE60301420T DE60301420D1 DE 60301420 D1 DE60301420 D1 DE 60301420D1 DE 60301420 T DE60301420 T DE 60301420T DE 60301420 T DE60301420 T DE 60301420T DE 60301420 D1 DE60301420 D1 DE 60301420D1
Authority
DE
Germany
Prior art keywords
dip4
distributed
parity checker
nested
bit diagonal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60301420T
Other languages
English (en)
Other versions
DE60301420T2 (de
Inventor
Ngok Ying Chu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Publication of DE60301420D1 publication Critical patent/DE60301420D1/de
Application granted granted Critical
Publication of DE60301420T2 publication Critical patent/DE60301420T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/33—Synchronisation based on error coding or decoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0079—Formats for control data
    • H04L1/008—Formats for control data where the control data relates to payload of a different packet

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Error Detection And Correction (AREA)
  • Dc Digital Transmission (AREA)
  • Detection And Correction Of Errors (AREA)
DE60301420T 2002-03-15 2003-03-17 Prüfer für verteilte 4-bits diagonal verschachtelte Parität (DIP4) Expired - Lifetime DE60301420T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US36405102P 2002-03-15 2002-03-15
US364051P 2002-03-15
US10/234,165 US7058881B2 (en) 2002-03-15 2002-09-05 Distributed 4-bits diagonal interleaved parity (DIP4) checker
US234165 2002-09-05

Publications (2)

Publication Number Publication Date
DE60301420D1 true DE60301420D1 (de) 2005-10-06
DE60301420T2 DE60301420T2 (de) 2006-06-29

Family

ID=27767492

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60301420T Expired - Lifetime DE60301420T2 (de) 2002-03-15 2003-03-17 Prüfer für verteilte 4-bits diagonal verschachtelte Parität (DIP4)

Country Status (3)

Country Link
US (1) US7058881B2 (de)
EP (1) EP1345122B1 (de)
DE (1) DE60301420T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6954466B1 (en) * 2002-03-05 2005-10-11 Modelware, Inc. Link-layer receiver
US7191388B1 (en) 2004-03-01 2007-03-13 Lattice Semiconductor Corporation Fast diagonal interleaved parity (DIP) calculator
BRPI0510375A (pt) * 2004-04-28 2007-11-06 Electrolux Home Prod Inc comunicação de aparelho sem fio com algoritmo de detecção e de captura
US7533286B2 (en) * 2005-06-29 2009-05-12 Intel Corporation Regulating application of clock to control current rush (DI/DT)
KR100833604B1 (ko) 2007-01-09 2008-05-30 삼성전자주식회사 패리티 에러 검출 회로
US9559882B2 (en) * 2014-04-01 2017-01-31 Apple Inc. Apparatus and methods for flexible provision of control data in large data structures

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5367544A (en) * 1989-05-04 1994-11-22 Northern Telecom Limited Data stream frame synchronisation
US5479416A (en) 1993-09-30 1995-12-26 Micron Technology, Inc. Apparatus and method for error detection and correction in radio frequency identification device
US5771249A (en) * 1994-09-02 1998-06-23 Toyo Communication Equipment Co., Ltd. ATM cell synchronous system
US5923653A (en) 1995-04-21 1999-07-13 Tektronix, Inc. SONET/SDH receiver processor
US5691996A (en) 1995-12-11 1997-11-25 International Business Machines Corporation Memory implemented error detection and correction code with address parity bits
US5636208A (en) 1996-04-12 1997-06-03 Bell Communications Research, Inc. Technique for jointly performing bit synchronization and error detection in a TDM/TDMA system
JP3671595B2 (ja) * 1997-04-01 2005-07-13 株式会社日立製作所 複合計算機システムおよび複合ｉ／ｏシステム
US6247103B1 (en) * 1998-01-06 2001-06-12 International Business Machines Corporation Host storage management control of outboard data movement using push-pull operations
US6173374B1 (en) * 1998-02-11 2001-01-09 Lsi Logic Corporation System and method for peer-to-peer accelerated I/O shipping between host bus adapters in clustered computer network
US6697367B1 (en) * 2000-06-12 2004-02-24 Emc Corporation Multihop system calls

Also Published As

Publication number Publication date
EP1345122A3 (de) 2004-03-10
US7058881B2 (en) 2006-06-06
EP1345122A2 (de) 2003-09-17
US20030182613A1 (en) 2003-09-25
DE60301420T2 (de) 2006-06-29
EP1345122B1 (de) 2005-08-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M