DE60301915D1 - System und Verfahren zur Konfiguration analoger Elemente eines konfigurierbaren Gerätes - Google Patents
System und Verfahren zur Konfiguration analoger Elemente eines konfigurierbaren GerätesInfo
- Publication number
- DE60301915D1 DE60301915D1 DE60301915T DE60301915T DE60301915D1 DE 60301915 D1 DE60301915 D1 DE 60301915D1 DE 60301915 T DE60301915 T DE 60301915T DE 60301915 T DE60301915 T DE 60301915T DE 60301915 D1 DE60301915 D1 DE 60301915D1
- Authority
- DE
- Germany
- Prior art keywords
- programmable
- configurable hardware
- memory locations
- hardware device
- configuration data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
- G06F30/343—Logical level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/38—Circuit design at the mixed level of analogue and digital signals
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/171,334 US7024654B2 (en) | 2002-06-11 | 2002-06-11 | System and method for configuring analog elements in a configurable hardware device |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60301915D1 true DE60301915D1 (de) | 2005-11-24 |
Family
ID=29711063
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60301915T Expired - Lifetime DE60301915D1 (de) | 2002-06-11 | 2003-06-11 | System und Verfahren zur Konfiguration analoger Elemente eines konfigurierbaren Gerätes |
Country Status (5)
Country | Link |
---|---|
US (1) | US7024654B2 (de) |
EP (1) | EP1376416B1 (de) |
JP (1) | JP2004110771A (de) |
AT (1) | ATE307360T1 (de) |
DE (1) | DE60301915D1 (de) |
Families Citing this family (73)
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US8176296B2 (en) | 2000-10-26 | 2012-05-08 | Cypress Semiconductor Corporation | Programmable microcontroller architecture |
US7765095B1 (en) | 2000-10-26 | 2010-07-27 | Cypress Semiconductor Corporation | Conditional branching in an in-circuit emulation system |
US8160864B1 (en) | 2000-10-26 | 2012-04-17 | Cypress Semiconductor Corporation | In-circuit emulator and pod synchronized boot |
US8103496B1 (en) | 2000-10-26 | 2012-01-24 | Cypress Semicondutor Corporation | Breakpoint control in an in-circuit emulation system |
US6724220B1 (en) | 2000-10-26 | 2004-04-20 | Cyress Semiconductor Corporation | Programmable microcontroller architecture (mixed analog/digital) |
US8149048B1 (en) | 2000-10-26 | 2012-04-03 | Cypress Semiconductor Corporation | Apparatus and method for programmable power management in a programmable analog circuit block |
US7406674B1 (en) | 2001-10-24 | 2008-07-29 | Cypress Semiconductor Corporation | Method and apparatus for generating microcontroller configuration information |
US8078970B1 (en) | 2001-11-09 | 2011-12-13 | Cypress Semiconductor Corporation | Graphical user interface with user-selectable list-box |
US8042093B1 (en) | 2001-11-15 | 2011-10-18 | Cypress Semiconductor Corporation | System providing automatic source code generation for personalization and parameterization of user modules |
US7774190B1 (en) | 2001-11-19 | 2010-08-10 | Cypress Semiconductor Corporation | Sleep and stall in an in-circuit emulation system |
US8069405B1 (en) | 2001-11-19 | 2011-11-29 | Cypress Semiconductor Corporation | User interface for efficiently browsing an electronic document using data-driven tabs |
US6971004B1 (en) | 2001-11-19 | 2005-11-29 | Cypress Semiconductor Corp. | System and method of dynamically reconfiguring a programmable integrated circuit |
US7844437B1 (en) | 2001-11-19 | 2010-11-30 | Cypress Semiconductor Corporation | System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit |
US7770113B1 (en) | 2001-11-19 | 2010-08-03 | Cypress Semiconductor Corporation | System and method for dynamically generating a configuration datasheet |
US7086014B1 (en) * | 2001-11-19 | 2006-08-01 | Cypress Semiconductor Corporation | Automatic generation of application program interfaces, source code, interrupts, and datasheets for microcontroller programming |
US8103497B1 (en) | 2002-03-28 | 2012-01-24 | Cypress Semiconductor Corporation | External interface for event architecture |
US7308608B1 (en) | 2002-05-01 | 2007-12-11 | Cypress Semiconductor Corporation | Reconfigurable testing system and method |
JP2005537563A (ja) * | 2002-08-30 | 2005-12-08 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | バージョンプログラム可能回路モジュール |
US7761845B1 (en) | 2002-09-09 | 2010-07-20 | Cypress Semiconductor Corporation | Method for parameterizing a user module |
US7131097B1 (en) * | 2002-09-24 | 2006-10-31 | Altera Corporation | Logic generation for multiple memory functions |
US20040136241A1 (en) | 2002-10-31 | 2004-07-15 | Lockheed Martin Corporation | Pipeline accelerator for improved computing architecture and related system and method |
US7159204B2 (en) * | 2003-01-28 | 2007-01-02 | Altera Corporation | System and method for design entry and synthesis in programmable logic devices |
US7295049B1 (en) | 2004-03-25 | 2007-11-13 | Cypress Semiconductor Corporation | Method and circuit for rapid alignment of signals |
US7200703B2 (en) * | 2004-06-08 | 2007-04-03 | Valmiki Ramanujan K | Configurable components for embedded system design |
US20050283542A1 (en) * | 2004-06-18 | 2005-12-22 | Xiaomao Xiao | Method and system for programming a plurality of different memory devices during development and production with a single controllable interface tool |
US8069436B2 (en) | 2004-08-13 | 2011-11-29 | Cypress Semiconductor Corporation | Providing hardware independence to automate code generation of processing device firmware |
US8286125B2 (en) * | 2004-08-13 | 2012-10-09 | Cypress Semiconductor Corporation | Model for a hardware device-independent method of defining embedded firmware for programmable systems |
US8566616B1 (en) * | 2004-09-10 | 2013-10-22 | Altera Corporation | Method and apparatus for protecting designs in SRAM-based programmable logic devices and the like |
US8612772B1 (en) * | 2004-09-10 | 2013-12-17 | Altera Corporation | Security core using soft key |
WO2006039710A2 (en) * | 2004-10-01 | 2006-04-13 | Lockheed Martin Corporation | Computer-based tool and method for designing an electronic circuit and related system and library for same |
US7332976B1 (en) | 2005-02-04 | 2008-02-19 | Cypress Semiconductor Corporation | Poly-phase frequency synthesis oscillator |
US7493578B1 (en) | 2005-03-18 | 2009-02-17 | Xilinx, Inc. | Correlation of data from design analysis tools with design blocks in a high-level modeling system |
US7400183B1 (en) | 2005-05-05 | 2008-07-15 | Cypress Semiconductor Corporation | Voltage controlled oscillator delay cell and method |
US7439764B2 (en) * | 2005-05-16 | 2008-10-21 | Georgia Tech Research Corporation | Systems and methods for programming large-scale field-programmable analog arrays |
US8089461B2 (en) | 2005-06-23 | 2012-01-03 | Cypress Semiconductor Corporation | Touch wake for electronic devices |
US7496869B1 (en) | 2005-10-04 | 2009-02-24 | Xilinx, Inc. | Method and apparatus for implementing a program language description of a circuit design for an integrated circuit |
US7363599B1 (en) | 2005-10-04 | 2008-04-22 | Xilinx, Inc. | Method and system for matching a hierarchical identifier |
US8085067B1 (en) | 2005-12-21 | 2011-12-27 | Cypress Semiconductor Corporation | Differential-to-single ended signal converter circuit and method |
US7380232B1 (en) | 2006-03-10 | 2008-05-27 | Xilinx, Inc. | Method and apparatus for designing a system for implementation in a programmable logic device |
US8402409B1 (en) * | 2006-03-10 | 2013-03-19 | Xilinx, Inc. | Method and apparatus for supporting run-time reconfiguration in a programmable logic integrated circuit |
US7761272B1 (en) | 2006-03-10 | 2010-07-20 | Xilinx, Inc. | Method and apparatus for processing a dataflow description of a digital processing system |
US8067948B2 (en) | 2006-03-27 | 2011-11-29 | Cypress Semiconductor Corporation | Input/output multiplexer bus |
US7904863B2 (en) * | 2006-12-04 | 2011-03-08 | Fujitsu Limited | Circuit-design supporting apparatus, circuit-design supporting method, computer product, and printed-circuit-board manufacturing method |
US8176457B2 (en) * | 2006-12-04 | 2012-05-08 | Fujitsu Limited | Apparatus and method updating diagram of circuit based on pin swap performed in package design with respect to PLD |
US8255844B2 (en) * | 2006-12-04 | 2012-08-28 | Fujitsu Limited | Coordinated-design supporting apparatus, coordinated-design supporting method, computer product, printed-circuit-board manufacturing method, circuit-design supporting apparatus, circuit-design supporting method, computer product, and printed-circuit-board manufacturing method |
CN101196945B (zh) * | 2006-12-04 | 2010-06-02 | 富士通株式会社 | 电路设计支持装置及方法、印刷电路板制造方法 |
EP1930825A3 (de) * | 2006-12-04 | 2011-06-29 | Fujitsu Limited | Vorrichtung zur Unterstützung von Schaltungsentwurf, Verfahren zur Unterstützung von Schaltungsentwurf, Computerprogramm und Herstellungsverfahren für einen gedruckten Schaltkreis |
US7913220B2 (en) * | 2006-12-04 | 2011-03-22 | Fujitsu Limited | Coordinated-design supporting apparatus, coordinated-design supporting method, computer product, and printed-circuit-board manufacturing method |
US9564902B2 (en) | 2007-04-17 | 2017-02-07 | Cypress Semiconductor Corporation | Dynamically configurable and re-configurable data path |
US8040266B2 (en) | 2007-04-17 | 2011-10-18 | Cypress Semiconductor Corporation | Programmable sigma-delta analog-to-digital converter |
US8516025B2 (en) | 2007-04-17 | 2013-08-20 | Cypress Semiconductor Corporation | Clock driven dynamic datapath chaining |
US8026739B2 (en) | 2007-04-17 | 2011-09-27 | Cypress Semiconductor Corporation | System level interconnect with programmable switching |
US8092083B2 (en) | 2007-04-17 | 2012-01-10 | Cypress Semiconductor Corporation | Temperature sensor with digital bandgap |
US8130025B2 (en) | 2007-04-17 | 2012-03-06 | Cypress Semiconductor Corporation | Numerical band gap |
US7737724B2 (en) | 2007-04-17 | 2010-06-15 | Cypress Semiconductor Corporation | Universal digital block interconnection and channel routing |
US9720805B1 (en) | 2007-04-25 | 2017-08-01 | Cypress Semiconductor Corporation | System and method for controlling a target device |
US8065653B1 (en) | 2007-04-25 | 2011-11-22 | Cypress Semiconductor Corporation | Configuration of programmable IC design elements |
US8266575B1 (en) | 2007-04-25 | 2012-09-11 | Cypress Semiconductor Corporation | Systems and methods for dynamically reconfiguring a programmable system on a chip |
US8402410B2 (en) * | 2007-08-27 | 2013-03-19 | Samsung Electronics Co., Ltd. | Method and apparatus for managing configuration memory of reconfigurable hardware |
US8049569B1 (en) | 2007-09-05 | 2011-11-01 | Cypress Semiconductor Corporation | Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes |
US8365111B2 (en) * | 2008-02-29 | 2013-01-29 | Et International, Inc. | Data driven logic simulation |
US9448964B2 (en) | 2009-05-04 | 2016-09-20 | Cypress Semiconductor Corporation | Autonomous control in a programmable system |
US8201126B1 (en) | 2009-11-12 | 2012-06-12 | Altera Corporation | Method and apparatus for performing hardware assisted placement |
JP5927012B2 (ja) | 2012-04-11 | 2016-05-25 | 太陽誘電株式会社 | 再構成可能な半導体装置 |
CN103729490A (zh) * | 2012-10-15 | 2014-04-16 | 飞思卡尔半导体公司 | 混合信号ip核原型设计系统 |
CN103048955B (zh) * | 2012-12-04 | 2015-10-28 | 常州大学 | 一种基于fpaa和fpga的智能重构柔性电机控制系统 |
JP6034699B2 (ja) * | 2013-01-07 | 2016-11-30 | ルネサスエレクトロニクス株式会社 | 半導体装置及びそのコマンド制御方法 |
US8997033B1 (en) * | 2014-03-05 | 2015-03-31 | Altera Corporation | Techniques for generating a single configuration file for multiple partial reconfiguration regions |
US9740809B2 (en) * | 2015-08-27 | 2017-08-22 | Altera Corporation | Efficient integrated circuits configuration data management |
US10152566B1 (en) * | 2016-09-27 | 2018-12-11 | Altera Corporation | Constraint based bit-stream compression in hardware for programmable devices |
CN109086068A (zh) * | 2017-06-14 | 2018-12-25 | 浙江昱能科技有限公司 | 一种fpga控制单元的配置数据更新系统及方法 |
US11043951B2 (en) * | 2018-11-30 | 2021-06-22 | Palo Alto Research Center Incorporated | Analog computer architecture for fast function optimization |
EP3736712A1 (de) | 2019-05-10 | 2020-11-11 | Carl Zeiss Industrielle Messtechnik GmbH | Verfahren zum zugriff auf einen speicher eines integrierten schaltkreises, programm, vorrichtung zur datenverarbeitung und netzwerk |
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US5598344A (en) * | 1990-04-06 | 1997-01-28 | Lsi Logic Corporation | Method and system for creating, validating, and scaling structural description of electronic device |
US5493672A (en) * | 1994-05-16 | 1996-02-20 | Sun Microsystems, Inc. | Concurrent simulation of host system at instruction level and input/output system at logic level with two-way communication deadlock resolution |
AU2646495A (en) | 1994-05-24 | 1995-12-18 | Imp Inc. | Integrated circuit having programmable analog functions and computer aided techniques for programming the circuit |
US5794062A (en) | 1995-04-17 | 1998-08-11 | Ricoh Company Ltd. | System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization |
GB9508932D0 (en) * | 1995-05-02 | 1995-06-21 | Xilinx Inc | FPGA with parallel and serial user interfaces |
US5583450A (en) * | 1995-08-18 | 1996-12-10 | Xilinx, Inc. | Sequencer for a time multiplexed programmable logic device |
US5745734A (en) * | 1995-09-29 | 1998-04-28 | International Business Machines Corporation | Method and system for programming a gate array using a compressed configuration bit stream |
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JP3743487B2 (ja) | 1999-07-14 | 2006-02-08 | 富士ゼロックス株式会社 | プログラマブル論理回路装置、情報処理システム、プログラマブル論理回路装置への回路の再構成方法、プログラマブル論理回路装置用の回路情報の圧縮方法 |
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US6255849B1 (en) * | 2000-02-04 | 2001-07-03 | Xilinx, Inc. | On-chip self-modification for PLDs |
US6584601B1 (en) * | 2000-02-07 | 2003-06-24 | National Instruments Corporation | System and method for converting graphical programs into hardware implementations which utilize probe insertion |
US6438737B1 (en) * | 2000-02-15 | 2002-08-20 | Intel Corporation | Reconfigurable logic for a computer |
US6326806B1 (en) | 2000-03-29 | 2001-12-04 | Xilinx, Inc. | FPGA-based communications access point and system for reconfiguration |
-
2002
- 2002-06-11 US US10/171,334 patent/US7024654B2/en not_active Expired - Lifetime
-
2003
- 2003-06-11 EP EP03253707A patent/EP1376416B1/de not_active Expired - Lifetime
- 2003-06-11 DE DE60301915T patent/DE60301915D1/de not_active Expired - Lifetime
- 2003-06-11 AT AT03253707T patent/ATE307360T1/de not_active IP Right Cessation
- 2003-06-11 JP JP2003167120A patent/JP2004110771A/ja not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
US20030229877A1 (en) | 2003-12-11 |
ATE307360T1 (de) | 2005-11-15 |
US7024654B2 (en) | 2006-04-04 |
JP2004110771A (ja) | 2004-04-08 |
EP1376416A1 (de) | 2004-01-02 |
EP1376416B1 (de) | 2005-10-19 |
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Legal Events
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8332 | No legal effect for de |