DE60314205D1 - Arbiter für ein Vermittlungssystem mit Eingangspuffer - Google Patents

Arbiter für ein Vermittlungssystem mit Eingangspuffer

Info

Publication number
DE60314205D1
DE60314205D1 DE60314205T DE60314205T DE60314205D1 DE 60314205 D1 DE60314205 D1 DE 60314205D1 DE 60314205 T DE60314205 T DE 60314205T DE 60314205 T DE60314205 T DE 60314205T DE 60314205 D1 DE60314205 D1 DE 60314205D1
Authority
DE
Germany
Prior art keywords
traffic
counter
counters
flow
input port
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60314205T
Other languages
English (en)
Other versions
DE60314205T2 (de
Inventor
Vishnu Meenaradchagan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Calix Inc
Original Assignee
Calix Networks Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Calix Networks Inc filed Critical Calix Networks Inc
Publication of DE60314205D1 publication Critical patent/DE60314205D1/de
Application granted granted Critical
Publication of DE60314205T2 publication Critical patent/DE60314205T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/253Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/255Control mechanisms for ATM switching fabrics
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00Traffic control in data switching networks
    • H04L47/10Flow control; Congestion control
    • H04L47/24Traffic characterised by specific attributes, e.g. priority or QoS
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5678Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/568Load balancing, smoothing or shaping
DE60314205T 2002-07-19 2003-07-17 Arbiter für ein Vermittlungssystem mit Eingangspuffer Expired - Lifetime DE60314205T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/199,996 US6954811B2 (en) 2002-07-19 2002-07-19 Arbiter for an input buffered communication switch
US199996 2002-07-19

Publications (2)

Publication Number Publication Date
DE60314205D1 true DE60314205D1 (de) 2007-07-19
DE60314205T2 DE60314205T2 (de) 2008-01-31

Family

ID=29780243

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60314205T Expired - Lifetime DE60314205T2 (de) 2002-07-19 2003-07-17 Arbiter für ein Vermittlungssystem mit Eingangspuffer

Country Status (4)

Country Link
US (1) US6954811B2 (de)
EP (1) EP1383287B1 (de)
AT (1) ATE364278T1 (de)
DE (1) DE60314205T2 (de)

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US8516163B2 (en) * 2007-02-27 2013-08-20 Integrated Device Technology, Inc. Hardware-based concurrent direct memory access (DMA) engines on serial rapid input/output SRIO interface
US7617346B2 (en) * 2007-02-27 2009-11-10 Integrated Device Technology, Inc. Rapid input/output doorbell coalescing to minimize CPU utilization and reduce system interrupt latency
US7870313B2 (en) * 2007-02-27 2011-01-11 Integrated Device Technology, Inc. Method and structure to support system resource access of a serial device implementating a lite-weight protocol
US20080209089A1 (en) * 2007-02-27 2008-08-28 Integrated Device Technology, Inc. Packet-Based Parallel Interface Protocol For A Serial Buffer Having A Parallel Processor Port
US8094677B2 (en) * 2007-02-27 2012-01-10 Integrated Device Technology, Inc. Multi-bus structure for optimizing system performance of a serial buffer
US7693040B1 (en) 2007-05-01 2010-04-06 Integrated Device Technology, Inc. Processing switch for orthogonal frequency division multiplexing
US7912068B2 (en) * 2007-07-20 2011-03-22 Oracle America, Inc. Low-latency scheduling in large switches
US7974278B1 (en) 2007-12-12 2011-07-05 Integrated Device Technology, Inc. Packet switch with configurable virtual channels
US7844757B2 (en) * 2008-06-12 2010-11-30 International Machines Business Corporation Method and system for providing multiple paths to user data stored on a SCSI disk
US7907625B1 (en) 2008-08-04 2011-03-15 Integrated Device Technology, Inc. Power reduction technique for buffered crossbar switch
US7965705B2 (en) * 2009-03-19 2011-06-21 Oracle America, Inc. Fast and fair arbitration on a data link
CN102164067B (zh) * 2010-02-20 2013-11-06 华为技术有限公司 交换网流控实现方法、交换设备及系统
US8667197B2 (en) 2010-09-08 2014-03-04 Intel Corporation Providing a fine-grained arbitration system
US9461915B1 (en) * 2012-01-26 2016-10-04 Google Inc. System and method for reducing consumption of hardware resources using weighted cost multi-path flow distribution
US8984206B2 (en) * 2012-10-31 2015-03-17 International Business Machines Corporation Weightage-based scheduling for hierarchical switching fabrics
US8902899B2 (en) 2013-02-08 2014-12-02 International Business Machines Corporation Input buffered switching device including bypass logic
GB2522653A (en) * 2014-01-31 2015-08-05 Ibm Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer system
US9467396B2 (en) 2014-04-11 2016-10-11 International Business Machines Corporation Simultaneous transfers from a single input link to multiple output links with a timesliced crossbar
US9942158B2 (en) * 2014-09-25 2018-04-10 Dell Products L.P. Data traffic policy management system
US9667722B2 (en) * 2014-10-20 2017-05-30 Arista Networks, Inc. Method and system for non-tagged based latency calculation
WO2018122583A1 (en) * 2016-12-30 2018-07-05 Intel Corporation System and method to enable fairness on multi-level arbitrations for switch architectures

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Also Published As

Publication number Publication date
EP1383287B1 (de) 2007-06-06
US20040017804A1 (en) 2004-01-29
EP1383287A1 (de) 2004-01-21
US6954811B2 (en) 2005-10-11
ATE364278T1 (de) 2007-06-15
DE60314205T2 (de) 2008-01-31

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