DE60326363D1 - Codierung von informationen in integrierten schaltungen - Google Patents
Codierung von informationen in integrierten schaltungenInfo
- Publication number
- DE60326363D1 DE60326363D1 DE60326363T DE60326363T DE60326363D1 DE 60326363 D1 DE60326363 D1 DE 60326363D1 DE 60326363 T DE60326363 T DE 60326363T DE 60326363 T DE60326363 T DE 60326363T DE 60326363 D1 DE60326363 D1 DE 60326363D1
- Authority
- DE
- Germany
- Prior art keywords
- signal
- paths
- path
- produced
- logic value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0266—Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
- G01R31/318538—Topological or mechanical aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02078779 | 2002-09-13 | ||
PCT/IB2003/003496 WO2004025838A1 (en) | 2002-09-13 | 2003-08-06 | Coding of information in integrated circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60326363D1 true DE60326363D1 (de) | 2009-04-09 |
Family
ID=31985093
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60326363T Expired - Lifetime DE60326363D1 (de) | 2002-09-13 | 2003-08-06 | Codierung von informationen in integrierten schaltungen |
Country Status (10)
Country | Link |
---|---|
US (1) | US7515074B2 (de) |
EP (1) | EP1540828B1 (de) |
JP (1) | JP2005538632A (de) |
KR (1) | KR20050043945A (de) |
CN (1) | CN100481731C (de) |
AT (1) | ATE424060T1 (de) |
AU (1) | AU2003255884A1 (de) |
DE (1) | DE60326363D1 (de) |
TW (1) | TWI310594B (de) |
WO (1) | WO2004025838A1 (de) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8145442B2 (en) * | 2009-01-30 | 2012-03-27 | Synopsys, Inc. | Fast and accurate estimation of gate output loading |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3084223A (en) * | 1960-12-23 | 1963-04-02 | Bell Telephone Labor Inc | Crosstalk reduction in plural carrier multiplex systems |
JPS5140449A (ja) * | 1974-10-04 | 1976-04-05 | Toray Industries | Makitorisochi |
JPS5784149A (en) * | 1980-11-14 | 1982-05-26 | Hitachi Ltd | Semiconductor integrated circuit device |
JPS604347A (ja) * | 1983-06-22 | 1985-01-10 | Fuji Xerox Co Ltd | デイジタル信号伝送システムの障害対策方式 |
US5493588A (en) * | 1992-01-22 | 1996-02-20 | Trimble Navigation Limited | Multipath compensation for code phase signals |
JP3136742B2 (ja) * | 1992-02-14 | 2001-02-19 | 日産自動車株式会社 | 通信装置 |
IL120538A (en) * | 1997-03-26 | 2000-11-21 | Dspc Tech Ltd | Method and apparatus for reducing spread-spectrum noise |
US6148038A (en) * | 1997-03-31 | 2000-11-14 | Sun Microsystems, Inc. | Circuit for detecting and decoding phase encoded digital serial data |
US6480548B1 (en) * | 1997-11-17 | 2002-11-12 | Silicon Graphics, Inc. | Spacial derivative bus encoder and decoder |
JP3137328B2 (ja) * | 1998-04-22 | 2001-02-19 | 富士通株式会社 | ノイズ除去方法および伝送回路 |
US6731622B1 (en) * | 1998-05-01 | 2004-05-04 | Telefonaktiebolaget Lm Ericsson (Publ) | Multipath propagation delay determining means using periodically inserted pilot symbols |
JP2001326584A (ja) * | 2000-05-18 | 2001-11-22 | Nec Corp | パス検出方式と受信装置 |
KR100335503B1 (ko) * | 2000-06-26 | 2002-05-08 | 윤종용 | 서로 다른 지연 특성을 동일하게 하는 신호 전달 회로,신호 전달 방법 및 이를 구비하는 반도체 장치의 데이터래치 회로 |
JP3696812B2 (ja) * | 2001-07-19 | 2005-09-21 | 富士通株式会社 | 入出力インタフェースおよび半導体集積回路 |
JP3813490B2 (ja) * | 2001-10-30 | 2006-08-23 | 富士通株式会社 | スペクトラム拡散レイク受信機 |
JP2003316736A (ja) * | 2002-04-19 | 2003-11-07 | Oki Electric Ind Co Ltd | Usb回路およびデータ構造 |
US6958721B2 (en) * | 2003-09-18 | 2005-10-25 | The Regents Of The University Of Colorado | Matched delay line voltage converter |
JP3927576B2 (ja) * | 2005-01-31 | 2007-06-13 | 富士通株式会社 | 入出力インタフェースおよび半導体集積回路 |
US20070271535A1 (en) * | 2006-05-16 | 2007-11-22 | National Tsing Hua University | Method for crosstalk elimination and bus architecture performing the same |
-
2003
- 2003-08-06 AU AU2003255884A patent/AU2003255884A1/en not_active Abandoned
- 2003-08-06 KR KR1020057004206A patent/KR20050043945A/ko not_active Application Discontinuation
- 2003-08-06 WO PCT/IB2003/003496 patent/WO2004025838A1/en active Application Filing
- 2003-08-06 CN CNB038217961A patent/CN100481731C/zh not_active Expired - Fee Related
- 2003-08-06 AT AT03795107T patent/ATE424060T1/de not_active IP Right Cessation
- 2003-08-06 EP EP03795107A patent/EP1540828B1/de not_active Expired - Lifetime
- 2003-08-06 DE DE60326363T patent/DE60326363D1/de not_active Expired - Lifetime
- 2003-08-06 US US10/527,551 patent/US7515074B2/en not_active Expired - Lifetime
- 2003-08-06 JP JP2004535729A patent/JP2005538632A/ja active Pending
- 2003-09-10 TW TW092125072A patent/TWI310594B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
AU2003255884A1 (en) | 2004-04-30 |
WO2004025838A1 (en) | 2004-03-25 |
US20050270194A1 (en) | 2005-12-08 |
EP1540828B1 (de) | 2009-02-25 |
TW200419734A (en) | 2004-10-01 |
KR20050043945A (ko) | 2005-05-11 |
JP2005538632A (ja) | 2005-12-15 |
TWI310594B (en) | 2009-06-01 |
US7515074B2 (en) | 2009-04-07 |
CN100481731C (zh) | 2009-04-22 |
ATE424060T1 (de) | 2009-03-15 |
EP1540828A1 (de) | 2005-06-15 |
CN1682447A (zh) | 2005-10-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |