DE68920908D1 - Programmierbare Logik-Vorrichtung. - Google Patents

Programmierbare Logik-Vorrichtung.

Info

Publication number
DE68920908D1
DE68920908D1 DE68920908T DE68920908T DE68920908D1 DE 68920908 D1 DE68920908 D1 DE 68920908D1 DE 68920908 T DE68920908 T DE 68920908T DE 68920908 T DE68920908 T DE 68920908T DE 68920908 D1 DE68920908 D1 DE 68920908D1
Authority
DE
Germany
Prior art keywords
programmable logic
logic device
programmable
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68920908T
Other languages
English (en)
Other versions
DE68920908T2 (de
Inventor
Mitsuo Higuchi
Kiyonori Ogura
Kohji Shimbayashi
Yasuhiro Nakaoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Application granted granted Critical
Publication of DE68920908D1 publication Critical patent/DE68920908D1/de
Publication of DE68920908T2 publication Critical patent/DE68920908T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H03K19/1736—Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17716—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register
DE68920908T 1988-05-25 1989-05-24 Programmierbare Logik-Vorrichtung. Expired - Fee Related DE68920908T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63126014A JP2548301B2 (ja) 1988-05-25 1988-05-25 プログラマブル論理回路装置

Publications (2)

Publication Number Publication Date
DE68920908D1 true DE68920908D1 (de) 1995-03-16
DE68920908T2 DE68920908T2 (de) 1995-05-24

Family

ID=14924591

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68920908T Expired - Fee Related DE68920908T2 (de) 1988-05-25 1989-05-24 Programmierbare Logik-Vorrichtung.

Country Status (5)

Country Link
US (1) US5053646A (de)
EP (1) EP0343968B1 (de)
JP (1) JP2548301B2 (de)
KR (1) KR930000971B1 (de)
DE (1) DE68920908T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5053647A (en) * 1989-07-17 1991-10-01 Fuji Photo Film Co., Ltd. Programmable logic array having feedback flip-flops connected between a product array's inputs and its outputs
US5220214A (en) * 1991-04-22 1993-06-15 Altera Corporation Registered logic macrocell with product term allocation and adjacent product term stealing
US5121006A (en) * 1991-04-22 1992-06-09 Altera Corporation Registered logic macrocell with product term allocation and adjacent product term stealing
US5384499A (en) * 1991-04-25 1995-01-24 Altera Corporation High-density erasable programmable logic device architecture using multiplexer interconnections
US5861760A (en) 1991-04-25 1999-01-19 Altera Corporation Programmable logic device macrocell with improved capability
US5130574A (en) * 1991-05-06 1992-07-14 Lattice Semiconductor Corporation Programmable logic device providing product term sharing and steering to the outputs of the programmable logic device
US5270587A (en) * 1992-01-06 1993-12-14 Micron Technology, Inc. CMOS logic cell for high-speed, zero-power programmable array logic devices
US5350954A (en) * 1993-03-29 1994-09-27 Altera Corporation Macrocell with flexible product term allocation
FR2716759B1 (fr) * 1994-02-28 1996-04-05 Sgs Thomson Microelectronics Etage de formatage d'opérandes optimisé.
US5689195A (en) * 1995-05-17 1997-11-18 Altera Corporation Programmable logic array integrated circuit devices
US5781031A (en) * 1995-11-21 1998-07-14 International Business Machines Corporation Programmable logic array
US5848285A (en) * 1995-12-26 1998-12-08 Cypress Semiconductor Corporation Macrocell having a dual purpose input register for use in a logic device
US5982193A (en) * 1997-12-22 1999-11-09 Vantis Corporation Input/output block (IOB) connections to MaxL lines, nor lines and dendrites in FPGA integrated circuits
JP4206203B2 (ja) * 1999-03-04 2009-01-07 アルテラ コーポレイション プログラマブルロジック集積回路デバイスの相互接続ならびに入力／出力リソース
US7248597B2 (en) * 2001-05-02 2007-07-24 Nvidia Corporation General purpose input/output controller
JP2003338750A (ja) * 2002-05-20 2003-11-28 Nec Electronics Corp 汎用ロジックセル、これを用いた汎用ロジックセルアレイ、及びこの汎用ロジックセルアレイを用いたａｓｉｃ
US7796464B1 (en) 2003-06-27 2010-09-14 Cypress Semiconductor Corporation Synchronous memory with a shadow-cycle counter
JP2005064701A (ja) * 2003-08-08 2005-03-10 Rohm Co Ltd クロック入出力装置
US7893772B1 (en) 2007-12-03 2011-02-22 Cypress Semiconductor Corporation System and method of loading a programmable counter
JP2012191455A (ja) 2011-03-10 2012-10-04 Toshiba Corp 半導体集積回路

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4124899A (en) * 1977-05-23 1978-11-07 Monolithic Memories, Inc. Programmable array logic circuit
US4578771A (en) * 1980-12-29 1986-03-25 International Business Machines Corporation Dynamically reprogrammable array logic system
US4422072A (en) 1981-07-30 1983-12-20 Signetics Corporation Field programmable logic array circuit
US4609986A (en) * 1984-06-14 1986-09-02 Altera Corporation Programmable logic array device using EPROM technology
US4684830A (en) * 1985-03-22 1987-08-04 Monolithic Memories, Inc. Output circuit for a programmable logic array
US4758746A (en) * 1985-08-12 1988-07-19 Monolithic Memories, Inc. Programmable logic array with added array of gates and added output routing flexibility
US4763020B1 (en) * 1985-09-06 1997-07-08 Ricoh Kk Programmable logic device having plural programmable function cells
JPS6264124A (ja) * 1985-09-13 1987-03-23 Ricoh Co Ltd プログラマブル・ロジツク・デバイス
US4771285A (en) * 1985-11-05 1988-09-13 Advanced Micro Devices, Inc. Programmable logic cell with flexible clocking and flexible feedback
US4758747A (en) * 1986-05-30 1988-07-19 Advanced Micro Devices, Inc. Programmable logic device with buried registers selectively multiplexed with output registers to ports, and preload circuitry therefor
EP0227329B1 (de) * 1985-12-06 1992-03-25 Advanced Micro Devices, Inc. Programmierbare logische Vorrichtung
JPS6323419A (ja) * 1986-07-15 1988-01-30 Ricoh Co Ltd プログラマブル・ロジツク・デバイス
US4983959A (en) * 1986-10-01 1991-01-08 Texas Instruments Incorporated Logic output macrocell
JPS63260319A (ja) * 1987-04-17 1988-10-27 Ricoh Co Ltd 論理集積回路装置
JPS6478023A (en) * 1987-09-18 1989-03-23 Fujitsu Ltd Programmable logic device
DE3871889T2 (de) * 1987-10-02 1992-12-24 Kawasaki Steel Co Programmierbare eingangs-/ausgangsschaltung.

Also Published As

Publication number Publication date
KR930000971B1 (en) 1993-02-11
JP2548301B2 (ja) 1996-10-30
EP0343968A2 (de) 1989-11-29
US5053646A (en) 1991-10-01
JPH01296818A (ja) 1989-11-30
EP0343968B1 (de) 1995-02-01
KR890017881A (ko) 1989-12-18
EP0343968A3 (en) 1990-10-31
DE68920908T2 (de) 1995-05-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee