DE68923828D1 - Architektur und Schnittstelle für Speicherkarten. - Google Patents

Architektur und Schnittstelle für Speicherkarten.

Info

Publication number
DE68923828D1
DE68923828D1 DE68923828T DE68923828T DE68923828D1 DE 68923828 D1 DE68923828 D1 DE 68923828D1 DE 68923828 T DE68923828 T DE 68923828T DE 68923828 T DE68923828 T DE 68923828T DE 68923828 D1 DE68923828 D1 DE 68923828D1
Authority
DE
Germany
Prior art keywords
architecture
interface
memory cards
cards
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68923828T
Other languages
English (en)
Other versions
DE68923828T2 (de
Inventor
David L Arlington
Jacqueline Morris Cole
Bruce G Hazelzet
David J Krolak
Hehching Harry Li
Bharat J Oza
A Frank Weaver
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE68923828D1 publication Critical patent/DE68923828D1/de
Publication of DE68923828T2 publication Critical patent/DE68923828T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/106—Correcting systematically all correctable errors, i.e. scrubbing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1028—Adjacent errors, e.g. error in n-bit (n>1) wide storage units, i.e. package error
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G06F11/1056—Updating check bits on partial write, i.e. read/modify/write
DE68923828T 1988-06-15 1989-05-17 Architektur und Schnittstelle für Speicherkarten. Expired - Fee Related DE68923828T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/206,757 US4888773A (en) 1988-06-15 1988-06-15 Smart memory card architecture and interface

Publications (2)

Publication Number Publication Date
DE68923828D1 true DE68923828D1 (de) 1995-09-21
DE68923828T2 DE68923828T2 (de) 1996-03-28

Family

ID=22767812

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68923828T Expired - Fee Related DE68923828T2 (de) 1988-06-15 1989-05-17 Architektur und Schnittstelle für Speicherkarten.

Country Status (4)

Country Link
US (1) US4888773A (de)
EP (1) EP0346629B1 (de)
JP (1) JPH06105443B2 (de)
DE (1) DE68923828T2 (de)

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Also Published As

Publication number Publication date
JPH0224752A (ja) 1990-01-26
JPH06105443B2 (ja) 1994-12-21
EP0346629A3 (de) 1991-05-29
US4888773A (en) 1989-12-19
EP0346629B1 (de) 1995-08-16
EP0346629A2 (de) 1989-12-20
DE68923828T2 (de) 1996-03-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee