DE68926783D1 - Paralleler datenprozessor - Google Patents

Paralleler datenprozessor

Info

Publication number
DE68926783D1
DE68926783D1 DE68926783T DE68926783T DE68926783D1 DE 68926783 D1 DE68926783 D1 DE 68926783D1 DE 68926783 T DE68926783 T DE 68926783T DE 68926783 T DE68926783 T DE 68926783T DE 68926783 D1 DE68926783 D1 DE 68926783D1
Authority
DE
Germany
Prior art keywords
data processor
parallel data
parallel
processor
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68926783T
Other languages
English (en)
Other versions
DE68926783T2 (de
Inventor
Wlodzimierz Holsztynski
Richard Benton
W Johnson
Robert Mcnamara
Roger Naeyaert
Douglas Noden
Ronald Schoomaker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Martin Marietta Corp
Original Assignee
Martin Marietta Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Martin Marietta Corp filed Critical Martin Marietta Corp
Publication of DE68926783D1 publication Critical patent/DE68926783D1/de
Application granted granted Critical
Publication of DE68926783T2 publication Critical patent/DE68926783T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
DE68926783T 1988-10-07 1989-09-29 Paralleler datenprozessor Expired - Fee Related DE68926783T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US25471888A 1988-10-07 1988-10-07
PCT/US1989/004281 WO1990004235A1 (en) 1988-10-07 1989-09-29 Parallel data processor

Publications (2)

Publication Number Publication Date
DE68926783D1 true DE68926783D1 (de) 1996-08-08
DE68926783T2 DE68926783T2 (de) 1996-11-28

Family

ID=22965319

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926783T Expired - Fee Related DE68926783T2 (de) 1988-10-07 1989-09-29 Paralleler datenprozessor

Country Status (6)

Country Link
US (1) US5421019A (de)
EP (1) EP0390907B1 (de)
JP (1) JP2930341B2 (de)
CA (1) CA2000151C (de)
DE (1) DE68926783T2 (de)
WO (1) WO1990004235A1 (de)

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US7581076B2 (en) 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US9436631B2 (en) 2001-03-05 2016-09-06 Pact Xpp Technologies Ag Chip including memory element storing higher level memory data on a page by page basis
US9552047B2 (en) 2001-03-05 2017-01-24 Pact Xpp Technologies Ag Multiprocessor having runtime adjustable clock and clock dependent power supply
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US10031733B2 (en) 2001-06-20 2018-07-24 Scientia Sol Mentis Ag Method for processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7577822B2 (en) 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
EP1483682A2 (de) 2002-01-19 2004-12-08 PACT XPP Technologies AG Reconfigurierbarer prozessor
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US8127061B2 (en) 2002-02-18 2012-02-28 Martin Vorbach Bus systems and reconfiguration methods
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US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
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Also Published As

Publication number Publication date
JPH03501787A (ja) 1991-04-18
DE68926783T2 (de) 1996-11-28
EP0390907A1 (de) 1990-10-10
US5421019A (en) 1995-05-30
EP0390907B1 (de) 1996-07-03
WO1990004235A1 (en) 1990-04-19
CA2000151A1 (en) 1990-04-07
CA2000151C (en) 1997-12-09
JP2930341B2 (ja) 1999-08-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee