DE69023455D1 - Wortdekodierungsschema für Speichermatrizen. - Google Patents

Wortdekodierungsschema für Speichermatrizen.

Info

Publication number
DE69023455D1
DE69023455D1 DE69023455T DE69023455T DE69023455D1 DE 69023455 D1 DE69023455 D1 DE 69023455D1 DE 69023455 T DE69023455 T DE 69023455T DE 69023455 T DE69023455 T DE 69023455T DE 69023455 D1 DE69023455 D1 DE 69023455D1
Authority
DE
Germany
Prior art keywords
memory arrays
decoding scheme
word decoding
word
scheme
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69023455T
Other languages
English (en)
Other versions
DE69023455T2 (de
Inventor
Yuen Hung Chan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69023455D1 publication Critical patent/DE69023455D1/de
Application granted granted Critical
Publication of DE69023455T2 publication Critical patent/DE69023455T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
DE69023455T 1989-10-30 1990-09-21 Wortdekodierungsschema für Speichermatrizen. Expired - Fee Related DE69023455T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/428,793 US5022010A (en) 1989-10-30 1989-10-30 Word decoder for a memory array

Publications (2)

Publication Number Publication Date
DE69023455D1 true DE69023455D1 (de) 1995-12-14
DE69023455T2 DE69023455T2 (de) 1996-06-20

Family

ID=23700425

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69023455T Expired - Fee Related DE69023455T2 (de) 1989-10-30 1990-09-21 Wortdekodierungsschema für Speichermatrizen.

Country Status (4)

Country Link
US (1) US5022010A (de)
EP (1) EP0426596B1 (de)
JP (1) JPH0746508B2 (de)
DE (1) DE69023455T2 (de)

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* Cited by examiner, † Cited by third party
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JPH04184793A (ja) * 1990-11-20 1992-07-01 Nec Corp 半導体デコード装置
US5109167A (en) * 1990-12-28 1992-04-28 International Business Machines Corp. PNP word line driver
US5283481A (en) * 1990-12-26 1994-02-01 International Business Machines Corporation Bipolar element bifet array decoder
JPH04351015A (ja) * 1991-05-28 1992-12-04 Nec Corp Ｅｃｌ型論理回路
US5210447A (en) * 1991-10-30 1993-05-11 International Business Machines Corporation Word decoder with sbd-tx clamp
US5276363A (en) * 1992-08-13 1994-01-04 International Business Machines Corporation Zero power decoder/driver
US5604712A (en) * 1995-09-13 1997-02-18 Lsi Logic Corporation Fast word line decoder for memory devices
US6195398B1 (en) 1997-12-19 2001-02-27 Stmicroelectronics, Inc. Method and apparatus for coding and communicating data in noisy environment
US7342846B2 (en) * 2005-07-22 2008-03-11 Lattice Semiconductor Corporation Address decoding systems and methods
JP4504397B2 (ja) * 2007-05-29 2010-07-14 株式会社東芝 半導体記憶装置

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US3541353A (en) * 1967-09-13 1970-11-17 Motorola Inc Mosfet digital gate
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US3942162A (en) * 1974-07-01 1976-03-02 Motorola, Inc. Pre-conditioning circuits for MOS integrated circuits
DE2557165C3 (de) * 1975-12-18 1979-01-18 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decoderschaltung und ihre Anordnung zur Integrierung auf einem Halbleiterbaustein
US4104735A (en) * 1976-09-15 1978-08-01 Siemens Aktiengesellschaft Arrangement for addressing a MOS store
US4112314A (en) * 1977-08-26 1978-09-05 International Business Machines Corporation Logical current switch
JPS5481046A (en) * 1977-12-12 1979-06-28 Fujitsu Ltd Decoder circuit
JPS5484936A (en) * 1977-12-20 1979-07-06 Fujitsu Ltd Decoder circuit
US4330851A (en) * 1980-03-21 1982-05-18 Texas Instruments Incorporated Dynamic decoder input for semiconductor memory
JPS573289A (en) * 1980-06-04 1982-01-08 Hitachi Ltd Semiconductor storing circuit device
JPS57130286A (en) * 1981-02-06 1982-08-12 Fujitsu Ltd Static semiconductor memory
EP0058958B1 (de) * 1981-02-25 1986-10-29 Kabushiki Kaisha Toshiba Komplementäre MOSFET-Logikschaltung
US4739497A (en) * 1981-05-29 1988-04-19 Hitachi, Ltd. Semiconductor memory
JPS589285A (ja) * 1981-07-08 1983-01-19 Toshiba Corp 半導体装置
JPS58169958A (ja) * 1982-03-31 1983-10-06 Fujitsu Ltd Ｍｉｓスタテイツク・ランダムアクセスメモリ
US4604533A (en) * 1982-12-28 1986-08-05 Tokyo Shibaura Denki Kabushiki Kaisha Sense amplifier
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
JPS59178685A (ja) * 1983-03-30 1984-10-09 Toshiba Corp 半導体記憶回路
JPH0693626B2 (ja) * 1983-07-25 1994-11-16 株式会社日立製作所 半導体集積回路装置
JPS6043295A (ja) * 1983-08-17 1985-03-07 Mitsubishi Electric Corp 半導体記憶装置
JPH0616585B2 (ja) * 1983-12-16 1994-03-02 株式会社日立製作所 バツフア回路
JPH0795395B2 (ja) * 1984-02-13 1995-10-11 株式会社日立製作所 半導体集積回路
ATE47928T1 (de) * 1984-05-14 1989-11-15 Ibm Halbleiterspeicher.
US4578779A (en) * 1984-06-25 1986-03-25 International Business Machines Corporation Voltage mode operation scheme for bipolar arrays
US4596002A (en) * 1984-06-25 1986-06-17 International Business Machines Corporation Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4598390A (en) * 1984-06-25 1986-07-01 International Business Machines Corporation Random access memory RAM employing complementary transistor switch (CTS) memory cells
US4616146A (en) * 1984-09-04 1986-10-07 Motorola, Inc. BI-CMOS driver circuit
US4675846A (en) * 1984-12-17 1987-06-23 International Business Machines Corporation Random access memory
US4636983A (en) * 1984-12-20 1987-01-13 Cypress Semiconductor Corp. Memory array biasing circuit for high speed CMOS device
US4639898A (en) * 1984-12-21 1987-01-27 Rca Corporation Bit-line pull-up circuit
US4730279A (en) * 1985-03-30 1988-03-08 Kabushiki Kaisha Toshiba Static semiconductor memory device
US4636990A (en) * 1985-05-31 1987-01-13 International Business Machines Corporation Three state select circuit for use in a data processing system or the like
US4658381A (en) * 1985-08-05 1987-04-14 Motorola, Inc. Bit line precharge on a column address change
JPS6235191A (ja) * 1985-08-06 1987-02-16 三井造船株式会社 上澄液排出用ジャバラホースの製造方法
US4740921A (en) * 1985-10-04 1988-04-26 Motorola, Inc. Precharge of a dram data line to an intermediate voltage
US4638186A (en) * 1985-12-02 1987-01-20 Motorola, Inc. BIMOS logic gate
US4678940A (en) * 1986-01-08 1987-07-07 Advanced Micro Devices, Inc. TTL compatible merged bipolar/CMOS output buffer circuits
US4649295A (en) * 1986-01-13 1987-03-10 Motorola, Inc. BIMOS logic gate
US4668879A (en) * 1986-02-10 1987-05-26 International Business Machines Corporation Dotted "or" function for current controlled gates
JPH0640439B2 (ja) * 1986-02-17 1994-05-25 日本電気株式会社 半導体記憶装置
JPS62221219A (ja) * 1986-03-22 1987-09-29 Toshiba Corp 論理回路
US4701642A (en) * 1986-04-28 1987-10-20 International Business Machines Corporation BICMOS binary logic circuits
US4752913A (en) * 1986-04-30 1988-06-21 International Business Machines Corporation Random access memory employing complementary transistor switch (CTS) memory cells
JPS6382122A (ja) * 1986-09-26 1988-04-12 Toshiba Corp 論理回路
US4728827A (en) * 1986-12-03 1988-03-01 Advanced Micro Devices, Inc. Static PLA or ROM circuit with self-generated precharge
JP2901973B2 (ja) * 1987-04-30 1999-06-07 株式会社日立製作所 半導体集積回路装置
US4746817A (en) * 1987-03-16 1988-05-24 International Business Machines Corporation BIFET logic circuit
JPS6425394A (en) * 1987-07-21 1989-01-27 Mitsubishi Electric Corp Nonvolatile semiconductor memory device
DE3788132T2 (de) * 1987-12-01 1994-05-11 Ibm Logische Schaltkreisfamilie von Multibasis-bi-CMOS.
US4831285A (en) * 1988-01-19 1989-05-16 National Semiconductor Corporation Self precharging static programmable logic array
US4866674A (en) * 1988-02-16 1989-09-12 Texas Instruments Incorporated Bitline pull-up circuit for a BiCMOS read/write memory
US4862421A (en) * 1988-02-16 1989-08-29 Texas Instruments Incorporated Sensing and decoding scheme for a BiCMOS read/write memory

Also Published As

Publication number Publication date
US5022010A (en) 1991-06-04
EP0426596A2 (de) 1991-05-08
JPH0746508B2 (ja) 1995-05-17
JPH03142784A (ja) 1991-06-18
DE69023455T2 (de) 1996-06-20
EP0426596A3 (de) 1991-07-24
EP0426596B1 (de) 1995-11-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee