DE69026230D1 - Phasenregelschaltung mit verringerter Frequenz/Phasensynchronisierungszeit - Google Patents

Phasenregelschaltung mit verringerter Frequenz/Phasensynchronisierungszeit

Info

Publication number
DE69026230D1
DE69026230D1 DE69026230T DE69026230T DE69026230D1 DE 69026230 D1 DE69026230 D1 DE 69026230D1 DE 69026230 T DE69026230 T DE 69026230T DE 69026230 T DE69026230 T DE 69026230T DE 69026230 D1 DE69026230 D1 DE 69026230D1
Authority
DE
Germany
Prior art keywords
phase
control circuit
synchronization time
reduced frequency
phase control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69026230T
Other languages
English (en)
Other versions
DE69026230T2 (de
Inventor
David Cyrille Babin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23816850&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69026230(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of DE69026230D1 publication Critical patent/DE69026230D1/de
Publication of DE69026230T2 publication Critical patent/DE69026230T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/199—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division with reset of the frequency divider or the counter, e.g. for assuring initial synchronisation
DE69026230T 1989-12-27 1990-12-19 Phasenregelschaltung mit verringerter Frequenz/Phasensynchronisierungszeit Expired - Fee Related DE69026230T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/457,465 US4951005A (en) 1989-12-27 1989-12-27 Phase locked loop with reduced frequency/phase lock time

Publications (2)

Publication Number Publication Date
DE69026230D1 true DE69026230D1 (de) 1996-05-02
DE69026230T2 DE69026230T2 (de) 1996-10-10

Family

ID=23816850

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69026230T Expired - Fee Related DE69026230T2 (de) 1989-12-27 1990-12-19 Phasenregelschaltung mit verringerter Frequenz/Phasensynchronisierungszeit

Country Status (4)

Country Link
US (1) US4951005A (de)
EP (1) EP0435552B1 (de)
JP (1) JP2929721B2 (de)
DE (1) DE69026230T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5041798A (en) * 1990-06-12 1991-08-20 International Business Machines Corporation Time reference with proportional steering
US5075638A (en) * 1990-12-26 1991-12-24 Motorola, Inc. Standby system for a frequency synthesizer
JPH0529932A (ja) * 1991-07-24 1993-02-05 Matsushita Electric Ind Co Ltd クロツク切り換え装置
US5267189A (en) * 1991-09-30 1993-11-30 Wilke William G Rational fraction synthesizer
JP2911276B2 (ja) * 1991-11-27 1999-06-23 三洋電機株式会社 Ｐｌｌ周波数シンセサイザ回路
DE4232609A1 (de) * 1992-09-29 1994-03-31 Bosch Gmbh Robert PLL-Schaltung
US5339278A (en) * 1993-04-12 1994-08-16 Motorola, Inc. Method and apparatus for standby recovery in a phase locked loop
US5317283A (en) * 1993-06-08 1994-05-31 Nokia Mobile Phones, Ltd. Method to reduce noise in PLL frequency synthesis
DE4498750C2 (de) * 1993-11-09 2001-04-12 Motorola Inc Fehlerunterdrückungsschaltung und zugehöriges Verfahren für einen PLL-Kreis
SE0003058D0 (sv) * 2000-08-30 2000-08-30 Ericsson Telefon Ab L M A state machine
KR20020035190A (ko) 2000-11-04 2002-05-11 윤종용 락 시간을 단축시키는 제어회로를 구비하는 위상동기루프회로
EP2041599B1 (de) * 2006-07-13 2010-09-01 Siemens Aktiengesellschaft Radaranordnung

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4378509A (en) * 1980-07-10 1983-03-29 Motorola, Inc. Linearized digital phase and frequency detector
CH670020A5 (en) * 1986-01-20 1989-04-28 Studer Willi Ag Signal synchronising phase-lock circuit - has frequency divider for output signal reset in synchronism with signal flanks of input signal
US4714899A (en) * 1986-09-30 1987-12-22 Motorola, Inc. Frequency synthesizer
CA1290407C (en) * 1986-12-23 1991-10-08 Shigeki Saito Frequency synthesizer
US4817199A (en) * 1987-07-17 1989-03-28 Rockwell International Corporation Phase locked loop having reduced response time

Also Published As

Publication number Publication date
US4951005A (en) 1990-08-21
EP0435552B1 (de) 1996-03-27
JP2929721B2 (ja) 1999-08-03
JPH04211520A (ja) 1992-08-03
DE69026230T2 (de) 1996-10-10
EP0435552A3 (en) 1991-11-06
EP0435552A2 (de) 1991-07-03

Similar Documents

Publication Publication Date Title
DE69022122D1 (de) Frequenzsteuerschaltung für VCO.
EP0416840A3 (en) Phase locked loop circuit with digital control
AU616611B2 (en) Compensated phase locked loop circuit
EP0157701A3 (en) Phase synchronization circuit
HK83395A (en) Voltage controlled oscillator circuit
DE69227608T2 (de) Veränderliche Taktteilerschaltung
GB8318888D0 (en) Phase lock loop circuit
DE69031134T2 (de) Phasenregelkreisschaltung
DE69026230D1 (de) Phasenregelschaltung mit verringerter Frequenz/Phasensynchronisierungszeit
DE69222093D1 (de) Selbsttätige automatische Frequenzsteuerschaltung
EP0335370A3 (en) Automatic frequency control circuit
SG30581G (en) Phase control circuit
DE68920004T2 (de) Sync-Detektorschaltung für Phasenregelschleife mit Frequenzteiler.
DE69026214D1 (de) Phasenregelschaltung
DE68922506T2 (de) Frequenzteilerschaltung.
DE69022126T2 (de) Frequenzteiler-Schaltung.
DE69032836D1 (de) Frequenzmodulatorschaltung mit VCO
DE69220889T2 (de) Spannungsgesteuerte Hochfrequenzoszillatorschaltung
EP0492476A3 (en) Oscillation frequency control circuit
GB2257316B (en) Phase-locked loop oscillator control circuit
KR910007892U (ko) 자동 주파수 제어회로
EP0411905A3 (en) Phase locked loop oscillating circuit
KR930005800U (ko) 위상동기 루프회로
KR930003812U (ko) 위상동기루프를 이용한 주파수 변조회로
KR920015896U (ko) 위상동기회로

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee