DE69027895T2 - Halbleiterspeicher - Google Patents

Halbleiterspeicher

Info

Publication number
DE69027895T2
DE69027895T2 DE69027895T DE69027895T DE69027895T2 DE 69027895 T2 DE69027895 T2 DE 69027895T2 DE 69027895 T DE69027895 T DE 69027895T DE 69027895 T DE69027895 T DE 69027895T DE 69027895 T2 DE69027895 T2 DE 69027895T2
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69027895T
Other languages
English (en)
Other versions
DE69027895D1 (de
Inventor
Kazuhiko Tani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69027895D1 publication Critical patent/DE69027895D1/de
Application granted granted Critical
Publication of DE69027895T2 publication Critical patent/DE69027895T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage
DE69027895T 1989-08-11 1990-08-10 Halbleiterspeicher Expired - Fee Related DE69027895T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1208572A JPH0371500A (ja) 1989-08-11 1989-08-11 半導体メモリ

Publications (2)

Publication Number Publication Date
DE69027895D1 DE69027895D1 (de) 1996-08-29
DE69027895T2 true DE69027895T2 (de) 1996-11-28

Family

ID=16558406

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69027895T Expired - Fee Related DE69027895T2 (de) 1989-08-11 1990-08-10 Halbleiterspeicher

Country Status (4)

Country Link
US (1) US5157628A (de)
EP (1) EP0412838B1 (de)
JP (1) JPH0371500A (de)
DE (1) DE69027895T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2575919B2 (ja) * 1990-03-22 1997-01-29 株式会社東芝 半導体記憶装置の冗長回路
JPH05166396A (ja) * 1991-12-12 1993-07-02 Mitsubishi Electric Corp 半導体メモリ装置
US5281868A (en) * 1992-08-18 1994-01-25 Micron Technology, Inc. Memory redundancy addressing circuit for adjacent columns in a memory
US5559742A (en) * 1995-02-23 1996-09-24 Micron Technology, Inc. Flash memory having transistor redundancy
US20020005408A1 (en) 1997-08-12 2002-01-17 Yuji Yamasaki Easy-opening can end
JP3194368B2 (ja) 1997-12-12 2001-07-30 日本電気株式会社 半導体記憶装置及びその駆動方法
JP4737929B2 (ja) * 2003-12-12 2011-08-03 株式会社東芝 半導体記憶装置
KR100624287B1 (ko) * 2004-05-11 2006-09-18 에스티마이크로일렉트로닉스 엔.브이. 낸드 플래시 메모리 소자의 리던던시 회로
JP4750813B2 (ja) * 2008-03-07 2011-08-17 力晶科技股▲ふん▼有限公司 不揮発性半導体記憶装置とその自己テスト方法
KR101890819B1 (ko) * 2012-05-22 2018-08-22 에스케이하이닉스 주식회사 메모리 장치 및 상기 장치의 데이터 입/출력 방법

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4744060A (en) * 1984-10-19 1988-05-10 Fujitsu Limited Bipolar-transistor type random access memory having redundancy configuration
US4757474A (en) * 1986-01-28 1988-07-12 Fujitsu Limited Semiconductor memory device having redundancy circuit portion
JP2639650B2 (ja) * 1987-01-14 1997-08-13 日本テキサス・インスツルメンツ株式会社 半導体装置
JPS63244494A (ja) * 1987-03-31 1988-10-11 Toshiba Corp 半導体記憶装置
JP2590897B2 (ja) * 1987-07-20 1997-03-12 日本電気株式会社 半導体メモリ
JPH07105157B2 (ja) * 1987-09-10 1995-11-13 日本電気株式会社 冗長メモリセル使用判定回路

Also Published As

Publication number Publication date
DE69027895D1 (de) 1996-08-29
EP0412838B1 (de) 1996-07-24
EP0412838A3 (en) 1992-01-08
EP0412838A2 (de) 1991-02-13
JPH0371500A (ja) 1991-03-27
US5157628A (en) 1992-10-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee