DE69028386D1 - Auf statischem RAM basierende Zelle für ein programmierbares logisches Feld - Google Patents

Auf statischem RAM basierende Zelle für ein programmierbares logisches Feld

Info

Publication number
DE69028386D1
DE69028386D1 DE69028386T DE69028386T DE69028386D1 DE 69028386 D1 DE69028386 D1 DE 69028386D1 DE 69028386 T DE69028386 T DE 69028386T DE 69028386 T DE69028386 T DE 69028386T DE 69028386 D1 DE69028386 D1 DE 69028386D1
Authority
DE
Germany
Prior art keywords
programmable logic
static ram
based cell
ram based
logic field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69028386T
Other languages
English (en)
Other versions
DE69028386T2 (de
Inventor
Randy Charles Steele
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Application granted granted Critical
Publication of DE69028386D1 publication Critical patent/DE69028386D1/de
Publication of DE69028386T2 publication Critical patent/DE69028386T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
    • H03K19/17712—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays one of the matrices at least being reprogrammable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
DE69028386T 1990-03-30 1990-12-21 Auf statischem RAM basierende Zelle für ein programmierbares logisches Feld Expired - Fee Related DE69028386T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/502,572 US5144582A (en) 1990-03-30 1990-03-30 Sram based cell for programmable logic devices

Publications (2)

Publication Number Publication Date
DE69028386D1 true DE69028386D1 (de) 1996-10-10
DE69028386T2 DE69028386T2 (de) 1997-04-03

Family

ID=23998412

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69028386T Expired - Fee Related DE69028386T2 (de) 1990-03-30 1990-12-21 Auf statischem RAM basierende Zelle für ein programmierbares logisches Feld

Country Status (5)

Country Link
US (1) US5144582A (de)
EP (1) EP0448879B1 (de)
JP (1) JPH04223714A (de)
KR (1) KR910017766A (de)
DE (1) DE69028386T2 (de)

Families Citing this family (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0497443B1 (de) * 1991-02-01 1999-08-04 Advanced Micro Devices, Inc. Mikrokontroller mit statischen RAM
US6759870B2 (en) 1991-09-03 2004-07-06 Altera Corporation Programmable logic array integrated circuits
US5550782A (en) * 1991-09-03 1996-08-27 Altera Corporation Programmable logic array integrated circuits
US20020130681A1 (en) 1991-09-03 2002-09-19 Cliff Richard G. Programmable logic array integrated circuits
US6260185B1 (en) 1995-04-21 2001-07-10 Hitachi, Ltd. Method for designing semiconductor integrated circuit and automatic designing device
US6845349B1 (en) 1995-04-21 2005-01-18 Renesas Technology Corp. Method for designing semiconductor integrated circuit and automatic designing device
TW298686B (de) * 1995-04-25 1997-02-21 Hitachi Ltd
US5867422A (en) * 1995-08-08 1999-02-02 University Of South Florida Computer memory chip with field programmable memory cell arrays (fpmcas), and method of configuring
US5694055A (en) * 1996-02-27 1997-12-02 Philips Electronic North America Corp. Zero static power programmable logic cell
US6107822A (en) 1996-04-09 2000-08-22 Altera Corporation Logic element for a programmable logic integrated circuit
EP0863515B1 (de) * 1997-03-05 2004-05-26 STMicroelectronics S.r.l. Verbindungskoppelmatrix für integrierte Halbleitermikrokontrollerschaltung
US6020759A (en) * 1997-03-21 2000-02-01 Altera Corporation Programmable logic array device with random access memory configurable as product terms
US6107819A (en) * 1997-06-30 2000-08-22 Intel Corporation Universal non volatile logic gate
US6081136A (en) * 1997-12-19 2000-06-27 Advanced Micro Devices, Inc. Dynamic NOR gates for NAND decode
US6075742A (en) * 1997-12-31 2000-06-13 Stmicroelectronics, Inc. Integrated circuit for switching from power supply to battery, integrated latch lock, and associated method for same
US6467017B1 (en) 1998-06-23 2002-10-15 Altera Corporation Programmable logic device having embedded dual-port random access memory configurable as single-port memory
US6144573A (en) 1998-06-26 2000-11-07 Altera Corporation Programmable logic devices with improved content addressable memory capabilities
US6453382B1 (en) 1998-11-05 2002-09-17 Altera Corporation Content addressable memory encoded outputs
US6388464B1 (en) 1999-12-30 2002-05-14 Cypress Semiconductor Corp. Configurable memory for programmable logic circuits
US6864710B1 (en) 1999-12-30 2005-03-08 Cypress Semiconductor Corp. Programmable logic device
US6608500B1 (en) 2000-03-31 2003-08-19 Cypress Semiconductor Corp. I/O architecture/cell design for programmable logic device
US6369609B1 (en) * 2000-05-08 2002-04-09 Cypress Semiconductor Corp. Degenerate network for PLD and plane
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US6720796B1 (en) 2001-05-06 2004-04-13 Altera Corporation Multiple size memories in a programmable logic device
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
CA2495316A1 (en) * 2002-08-09 2004-02-19 The Governing Council Of The University Of Toronto Low leakage asymmetric sram cell devices
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
CA2413467A1 (en) * 2002-11-29 2004-05-29 Ian Glenn Towe Spacer for electrically driven membrane process apparatus
US7111110B1 (en) 2002-12-10 2006-09-19 Altera Corporation Versatile RAM for programmable logic device
US7796464B1 (en) 2003-06-27 2010-09-14 Cypress Semiconductor Corporation Synchronous memory with a shadow-cycle counter
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8516025B2 (en) 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US8130025B2 (en) 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US7893772B1 (en) 2007-12-03 2011-02-22 Cypress Semiconductor Corporation System and method of loading a programmable counter
US8130538B2 (en) * 2009-01-15 2012-03-06 Altera Corporation Non-volatile memory circuit including voltage divider with phase change memory devices
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3706978A (en) * 1971-11-11 1972-12-19 Ibm Functional storage array
JPS55130317A (en) * 1979-03-30 1980-10-09 Mitsubishi Electric Corp Controlling method for tension
JPS595986A (ja) * 1982-07-02 1984-01-12 Canon Inc シ−ト通過検出装置
JPS60204118A (ja) * 1984-03-28 1985-10-15 Toshiba Corp 任意の論理関数を実現する方法及び装置
GB2171231B (en) * 1985-02-14 1989-11-01 Intel Corp Software programmable logic array
JPS62269420A (ja) * 1986-05-16 1987-11-21 Matsushita Electric Ind Co Ltd 半導体装置
US4789951A (en) * 1986-05-16 1988-12-06 Advanced Micro Devices, Inc. Programmable array logic cell
US4796229A (en) * 1986-07-08 1989-01-03 Texas Instruments Incorporated Writable logic array
JP2541248B2 (ja) * 1987-11-20 1996-10-09 三菱電機株式会社 プログラマブル・ロジック・アレイ

Also Published As

Publication number Publication date
DE69028386T2 (de) 1997-04-03
EP0448879B1 (de) 1996-09-04
US5144582A (en) 1992-09-01
EP0448879A1 (de) 1991-10-02
JPH04223714A (ja) 1992-08-13
KR910017766A (ko) 1991-11-05

Similar Documents

Publication Publication Date Title
DE69028386T2 (de) Auf statischem RAM basierende Zelle für ein programmierbares logisches Feld
DE69314880D1 (de) Flexible synchrone/asynchrone Zellenstruktur für eine programmierbare logische Vorrichtung
DE69322845D1 (de) Verbessertes bistabiles Adressierungsverfahren für ein DMD
ATE136653T1 (de) Einschrittest für absolute zellzahlen
DE69519696D1 (de) Zusammensetzung für eine Kunststofflinse auf Urethanbasis
ATA182888A (de) Gangregulierung für ein scharnier
DE59308767D1 (de) Halterung für ein zielfernrohr
DE69431963T2 (de) Kathtersystem mit verbesserter spürspitze für ein arbeitsteil
DE68926745D1 (de) Zwischenstruktur für ein tabellenblatt
DE69313827T2 (de) Halter für ein Glas
DE3276729D1 (en) A memory system with flexible replacement units
DE69117855D1 (de) Steuerschaltung für ein Anzeigegerät
DE69409604T2 (de) Schutzschaltung für ein Schaltnetzteil
DE68907692T2 (de) Schiebedachaufbau für ein Fahrzeug.
DE68912592D1 (de) Anordnung für ein markierungssystem.
DE69305094D1 (de) Antioxydierungsschutz für ein kohlenstoffhaltiges material
DE69123122D1 (de) Steuerschaltung für ein Anzeigegerät
DE69316692D1 (de) Wechselrichter für ein elektrisches Betriebsmittel
DE59307051D1 (de) Stromversorgungsschaltung für ein Funkgerät
DE69434516D1 (de) Ladezustandsanzeige für ein Funkgerät
DE69124364D1 (de) Vorschubfahrzeug für ein kontinuierlich arbeitendes abbaugerät
DE4392144T1 (de) Harzzusammensetzung für ein Gleitstück
DE58905441D1 (de) Schliessverfahren für einen Nähguthalter.
DE69430019D1 (de) Herstellungsverfahren für ein Leiterrahmen-Material
DE9400034U1 (de) Rahmen für ein Laufställchen

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee