DE69030066T2 - Rechner ausgestattet mit mehreren Prozessoren - Google Patents

Rechner ausgestattet mit mehreren Prozessoren

Info

Publication number
DE69030066T2
DE69030066T2 DE69030066T DE69030066T DE69030066T2 DE 69030066 T2 DE69030066 T2 DE 69030066T2 DE 69030066 T DE69030066 T DE 69030066T DE 69030066 T DE69030066 T DE 69030066T DE 69030066 T2 DE69030066 T2 DE 69030066T2
Authority
DE
Germany
Prior art keywords
computer equipped
several processors
processors
several
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69030066T
Other languages
English (en)
Other versions
DE69030066D1 (de
Inventor
Katsumi Kawano
Kinji Mori
Masayuki Orimo
Hiroshi Fujise
Masuyuki Takeuchi
Shoji Iwamoto
Hitoshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE69030066D1 publication Critical patent/DE69030066D1/de
Publication of DE69030066T2 publication Critical patent/DE69030066T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
DE69030066T 1989-12-26 1990-12-18 Rechner ausgestattet mit mehreren Prozessoren Expired - Fee Related DE69030066T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33696589 1989-12-26

Publications (2)

Publication Number Publication Date
DE69030066D1 DE69030066D1 (de) 1997-04-10
DE69030066T2 true DE69030066T2 (de) 1997-09-18

Family

ID=18304247

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69030066T Expired - Fee Related DE69030066T2 (de) 1989-12-26 1990-12-18 Rechner ausgestattet mit mehreren Prozessoren

Country Status (4)

Country Link
US (1) US5361366A (de)
EP (1) EP0435141B1 (de)
JP (1) JPH03223957A (de)
DE (1) DE69030066T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2139583T3 (es) * 1992-08-19 2000-02-16 Siemens Nixdorf Inf Syst Sistema multiprocesador con memorias cache.
US5802295A (en) * 1994-09-12 1998-09-01 Canon Kabushiki Kaisha Information processing method and system therefor
US6786420B1 (en) 1997-07-15 2004-09-07 Silverbrook Research Pty. Ltd. Data distribution mechanism in the form of ink dots on cards
US6618117B2 (en) 1997-07-12 2003-09-09 Silverbrook Research Pty Ltd Image sensing apparatus including a microcontroller
US7110024B1 (en) 1997-07-15 2006-09-19 Silverbrook Research Pty Ltd Digital camera system having motion deblurring means
US6624848B1 (en) 1997-07-15 2003-09-23 Silverbrook Research Pty Ltd Cascading image modification using multiple digital cameras incorporating image processing
US6879341B1 (en) 1997-07-15 2005-04-12 Silverbrook Research Pty Ltd Digital camera system containing a VLIW vector processor
US7551201B2 (en) 1997-07-15 2009-06-23 Silverbrook Research Pty Ltd Image capture and processing device for a print on demand digital camera system
US6690419B1 (en) 1997-07-15 2004-02-10 Silverbrook Research Pty Ltd Utilising eye detection methods for image processing in a digital image camera
AUPP702098A0 (en) 1998-11-09 1998-12-03 Silverbrook Research Pty Ltd Image creation method and apparatus (ART73)
AUPQ056099A0 (en) 1999-05-25 1999-06-17 Silverbrook Research Pty Ltd A method and apparatus (pprint01)
US20030126258A1 (en) * 2000-02-22 2003-07-03 Conkright Gary W. Web based fault detection architecture
FR2807594A1 (fr) * 2000-04-05 2001-10-12 Inup Ferme d'ordinateurs simulant un reseau local avec surveillance de la simulation
FR2807533B1 (fr) * 2000-04-05 2002-07-12 Inup Ferme d'ordinateur avec systeme de transfert de fichiers entre cartes processeurs
US7213168B2 (en) * 2003-09-16 2007-05-01 Rockwell Automation Technologies, Inc. Safety controller providing for execution of standard and safety control programs
US20110314256A1 (en) * 2010-06-18 2011-12-22 Microsoft Corporation Data Parallel Programming Model
US8589867B2 (en) 2010-06-18 2013-11-19 Microsoft Corporation Compiler-generated invocation stubs for data parallel programming model
CN115173998A (zh) * 2022-07-05 2022-10-11 浙江中控技术股份有限公司 一种多处理器交互通信方法、系统及存储介质

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2476349A1 (fr) * 1980-02-15 1981-08-21 Philips Ind Commerciale Systeme de traitement de donnees reparti
US5047925A (en) * 1985-05-06 1991-09-10 Motorola, Inc. Logical ring in a virtual single machine
EP0317828A3 (de) * 1987-11-23 1990-10-31 Siemens Aktiengesellschaft Serieller Bus in einem Rechnersystem für interne Übertragungen

Also Published As

Publication number Publication date
JPH03223957A (ja) 1991-10-02
DE69030066D1 (de) 1997-04-10
EP0435141A2 (de) 1991-07-03
US5361366A (en) 1994-11-01
EP0435141B1 (de) 1997-03-05
EP0435141A3 (en) 1993-01-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee