DE69032498T2 - Zellenvermittlungseinrichtung - Google Patents
ZellenvermittlungseinrichtungInfo
- Publication number
- DE69032498T2 DE69032498T2 DE69032498T DE69032498T DE69032498T2 DE 69032498 T2 DE69032498 T2 DE 69032498T2 DE 69032498 T DE69032498 T DE 69032498T DE 69032498 T DE69032498 T DE 69032498T DE 69032498 T2 DE69032498 T2 DE 69032498T2
- Authority
- DE
- Germany
- Prior art keywords
- cell switch
- cell
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/065—Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
- H04L49/105—ATM switching elements
- H04L49/108—ATM switching elements using shared central buffer
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/25—Routing or path finding in a switch fabric
- H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
- H04L49/255—Control mechanisms for ATM switching fabrics
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F2205/06—Indexing scheme relating to groups G06F5/06 - G06F5/16
- G06F2205/066—User-programmable number or size of buffers, i.e. number of separate buffers or their size can be allocated freely
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27564589 | 1989-10-23 | ||
JP5112090 | 1990-03-02 | ||
JP17899390 | 1990-07-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69032498D1 DE69032498D1 (de) | 1998-08-27 |
DE69032498T2 true DE69032498T2 (de) | 1999-03-04 |
Family
ID=27294212
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69032498T Expired - Lifetime DE69032498T2 (de) | 1989-10-23 | 1990-10-23 | Zellenvermittlungseinrichtung |
Country Status (4)
Country | Link |
---|---|
US (1) | US5649217A (de) |
EP (1) | EP0425990B1 (de) |
CA (1) | CA2028329C (de) |
DE (1) | DE69032498T2 (de) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3269273B2 (ja) * | 1994-09-02 | 2002-03-25 | 三菱電機株式会社 | セル交換装置及びセル交換システム |
US5991835A (en) * | 1994-11-22 | 1999-11-23 | Teac Corporation | Peripheral data storage device in which time interval used for data transfer from relatively fast buffer memory to relatively slower main memory is selected in view of average of time intervals during which data blocks were recently received from host |
JP3075163B2 (ja) * | 1996-01-10 | 2000-08-07 | 日本電気株式会社 | マルチポートフレーム交換方式 |
JPH10283088A (ja) * | 1997-04-02 | 1998-10-23 | Oki Electric Ind Co Ltd | シリアル通信回路 |
US6122274A (en) * | 1997-11-16 | 2000-09-19 | Sanjeev Kumar | ATM switching system with decentralized pipeline control and plural memory modules for very high capacity data switching |
JPH11261566A (ja) * | 1998-03-09 | 1999-09-24 | Fujitsu Ltd | 画像伝送装置 |
US6239815B1 (en) | 1998-04-03 | 2001-05-29 | Avid Technology, Inc. | Video data storage and transmission formats and apparatus and methods for processing video data in such formats |
US6275508B1 (en) * | 1998-04-21 | 2001-08-14 | Nexabit Networks, Llc | Method of and system for processing datagram headers for high speed computer network interfaces at low clock speeds, utilizing scalable algorithms for performing such network header adaptation (SAPNA) |
US6347348B1 (en) * | 1998-06-30 | 2002-02-12 | Sun Microsystems, Inc. | Buffer management system having an output control configured to retrieve data in response to a retrieval request from a requesting one of a plurality of destinations |
EP1180874A4 (de) * | 1999-05-28 | 2008-02-27 | Fujitsu Ltd | Verfahren und vorrichtungen zum schreiben und lesen von nachrichten undsteuerungschaltungen zur speicheradressierung beim schreiben und lesen vonnachrichten veränderlicher länge |
JP4222694B2 (ja) * | 1999-08-30 | 2009-02-12 | 富士通株式会社 | Atmセル多重装置 |
US6477595B1 (en) * | 1999-10-25 | 2002-11-05 | E-Cell Technologies | Scalable DSL access multiplexer with high reliability |
US7102999B1 (en) | 1999-11-24 | 2006-09-05 | Juniper Networks, Inc. | Switching device |
US6704817B1 (en) * | 2000-08-31 | 2004-03-09 | Hewlett-Packard Development Company, L.P. | Computer architecture and system for efficient management of bi-directional bus |
US7006505B1 (en) * | 2000-10-23 | 2006-02-28 | Bay Microsystems, Inc. | Memory management system and algorithm for network processor architecture |
JP4185678B2 (ja) * | 2001-06-08 | 2008-11-26 | 株式会社日立製作所 | 液晶表示装置 |
US7145567B2 (en) | 2003-04-03 | 2006-12-05 | Avid Technology, Inc. | Bitstream format and reading and writing methods and apparatus therefor |
WO2006026461A2 (en) * | 2004-08-27 | 2006-03-09 | Board Of Regents, The University Of Texas System | Methods for memory assignment schemes and architecture for shareable parallel memory module based internet switches |
US7639678B2 (en) * | 2004-12-02 | 2009-12-29 | Nortel Networks Limited | Multimodal data switch |
US9154255B2 (en) | 2009-08-27 | 2015-10-06 | Maged E. Beshai | Single-rotator latent space switch with an external controller |
US9252909B2 (en) | 2009-08-27 | 2016-02-02 | Maged E. Beshai | Single-rotator latent space switch with an embedded controller |
US8971340B2 (en) | 2009-08-27 | 2015-03-03 | Maged E. Beshai | Latent space switch using a single transposing rotator |
FR2982054B1 (fr) * | 2011-10-28 | 2014-06-20 | Ingenico Sa | Procede et dispositif de gestion d'une matrice de touches, produit programme d'ordinateur et moyen de stockage correspondants. |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4692894A (en) * | 1984-12-18 | 1987-09-08 | Advanced Micro Devices, Inc. | Overflow/Underflow detection for elastic buffer |
US4734907A (en) * | 1985-09-06 | 1988-03-29 | Washington University | Broadcast packet switching network |
US4920534A (en) * | 1986-02-28 | 1990-04-24 | At&T Bell Laboratories | System for controllably eliminating bits from packet information field based on indicator in header and amount of data in packet buffer |
US4949301A (en) * | 1986-03-06 | 1990-08-14 | Advanced Micro Devices, Inc. | Improved pointer FIFO controller for converting a standard RAM into a simulated dual FIFO by controlling the RAM's address inputs |
US4851991A (en) * | 1987-02-24 | 1989-07-25 | Digital Equipment Corporation | Central processor unit for digital data processing system including write buffer management mechanism |
BE1000396A7 (fr) * | 1987-03-18 | 1988-11-22 | Electronique Et Telecomm Bell | Systeme de commutation. |
FR2618624B1 (fr) * | 1987-07-24 | 1992-04-30 | Michel Servel | Systeme de commutation de multiplex temporels hybrides a memoire tampon optimisee |
US4975906A (en) * | 1988-02-15 | 1990-12-04 | Hitachi, Ltd. | Network system |
US5144622A (en) * | 1988-02-15 | 1992-09-01 | Hitachi, Ltd. | Network system |
JPH0211724A (ja) * | 1988-06-29 | 1990-01-16 | Kawasaki Steel Corp | 鋼管の浸漬焼入れ時における焼割れ防止方法 |
JP2795375B2 (ja) * | 1989-03-01 | 1998-09-10 | 富士通株式会社 | Atm交換装置及びその現用/予備切替え方法 |
JP2910770B2 (ja) * | 1989-03-20 | 1999-06-23 | 富士通株式会社 | 自己ルーチング交換システム及び自己ルーチング交換システムの現用/予備切替え方法 |
US5210744A (en) * | 1989-06-28 | 1993-05-11 | Mitsubishi Denki Kabushiki Kaisha | Cell exchange apparatus |
JPH03182140A (ja) * | 1989-12-11 | 1991-08-08 | Mitsubishi Electric Corp | 共通バッファ形交換装置 |
-
1990
- 1990-10-23 EP EP90120334A patent/EP0425990B1/de not_active Expired - Lifetime
- 1990-10-23 DE DE69032498T patent/DE69032498T2/de not_active Expired - Lifetime
- 1990-10-23 CA CA002028329A patent/CA2028329C/en not_active Expired - Lifetime
-
1993
- 1993-09-02 US US08/116,215 patent/US5649217A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
CA2028329A1 (en) | 1991-04-24 |
EP0425990B1 (de) | 1998-07-22 |
EP0425990A3 (en) | 1992-09-16 |
DE69032498D1 (de) | 1998-08-27 |
US5649217A (en) | 1997-07-15 |
EP0425990A2 (de) | 1991-05-08 |
CA2028329C (en) | 2000-01-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) |