US5452231A
(en)
*
|
1988-10-05 |
1995-09-19 |
Quickturn Design Systems, Inc. |
Hierarchically connected reconfigurable logic assembly
|
US5109353A
(en)
*
|
1988-12-02 |
1992-04-28 |
Quickturn Systems, Incorporated |
Apparatus for emulation of electronic hardware system
|
US5329470A
(en)
*
|
1988-12-02 |
1994-07-12 |
Quickturn Systems, Inc. |
Reconfigurable hardware emulation system
|
US5369593A
(en)
|
1989-05-31 |
1994-11-29 |
Synopsys Inc. |
System for and method of connecting a hardware modeling element to a hardware modeling system
|
US5353243A
(en)
|
1989-05-31 |
1994-10-04 |
Synopsys Inc. |
Hardware modeling system and method of use
|
DE69032640D1
(de)
*
|
1989-09-05 |
1998-10-15 |
Lsi Logic Corp |
Logik-Kompilator zum Entwurf von Schaltungsmodellen
|
US5416717A
(en)
*
|
1989-09-06 |
1995-05-16 |
Hitachi, Ltd. |
Circuit simulation method for a circuit realized by an LSI layout pattern based upon a circuit of a logic gate level realized by the layout pattern
|
US5164911A
(en)
*
|
1989-12-15 |
1992-11-17 |
Hewlett-Packard Company |
Schematic capture method having different model couplers for model types for changing the definition of the schematic based upon model type selection
|
JP2847310B2
(ja)
*
|
1990-01-12 |
1999-01-20 |
東京エレクトロン株式会社 |
論理シミュレーション方法
|
US5245549A
(en)
*
|
1990-01-29 |
1993-09-14 |
Fujitsu Limited |
Gate addressing system for logic simulation machine
|
US5438673A
(en)
*
|
1990-08-17 |
1995-08-01 |
Cray Research, Inc. |
Automatic interface for CPU real machine and logic simulator diagnostics
|
US5345393A
(en)
*
|
1990-08-22 |
1994-09-06 |
Matsushita Electric Industrial Co., Ltd. |
Logic circuit generator
|
JPH04123269A
(ja)
*
|
1990-09-14 |
1992-04-23 |
Fujitsu Ltd |
Plaのシミュレーション方式
|
US5193068A
(en)
*
|
1990-10-01 |
1993-03-09 |
Northern Telecom Limited |
Method of inducing off-circuit behavior in a physical model
|
US5717928A
(en)
*
|
1990-11-07 |
1998-02-10 |
Matra Hachette Sa |
System and a method for obtaining a mask programmable device using a logic description and a field programmable device implementing the logic description
|
JPH04186866A
(ja)
*
|
1990-11-21 |
1992-07-03 |
Fujitsu Ltd |
半導体装置における電源線の配線方法及び電源配線決定装置
|
US5390320A
(en)
*
|
1991-01-22 |
1995-02-14 |
Grumman Aerospace Corporation |
Automatically converting structured analysis tool database outputs into an integrated simulation model via transportable standardized metafile
|
JPH04237143A
(ja)
*
|
1991-01-22 |
1992-08-25 |
Rohm Co Ltd |
論理回路のレイアウトパターン検証方法
|
US5251159A
(en)
*
|
1991-03-20 |
1993-10-05 |
Vlsi Technology, Inc. |
Circuit simulation interface methods
|
GB9106758D0
(en)
*
|
1991-03-28 |
1991-05-15 |
Genrad Ltd |
A system for determining the operations of an integrated circuit and processor for use therein
|
EP0508620B1
(de)
*
|
1991-04-11 |
1998-05-20 |
Hewlett-Packard Company |
Verfahren und System zur automatischen Bestimmung der logischen Funktion einer Schaltung
|
EP0508619A2
(de)
*
|
1991-04-11 |
1992-10-14 |
Hewlett-Packard Company |
Stimulus-Schnittstelle mit bidirektionalem Sockel für einen Logiksimulator
|
WO1993016433A1
(en)
*
|
1992-02-07 |
1993-08-19 |
Seiko Epson Corporation |
Hardware emulation accelerator and method
|
US5331570A
(en)
*
|
1992-03-27 |
1994-07-19 |
Mitsubishi Electric Research Laboratories, Inc. |
Method for generating test access procedures
|
US5418931A
(en)
*
|
1992-03-27 |
1995-05-23 |
Cadence Design Systems, Inc. |
Method and apparatus for detecting timing errors in digital circuit designs
|
US5359545A
(en)
*
|
1992-04-10 |
1994-10-25 |
Itt Corporation |
Dynamic video display for logic simulation systems
|
US5615356A
(en)
*
|
1992-04-21 |
1997-03-25 |
Cpu Technology, Inc. |
Method and apparatus for interactively displaying signal information during computer simulation of an electrical circuit
|
EP0597087B1
(de)
*
|
1992-06-02 |
1999-07-28 |
Hewlett-Packard Company |
Verfahren zum rechnergestützten entwurf für mehrschichtverbindungen-technologien
|
AU4798793A
(en)
|
1992-08-10 |
1994-03-03 |
Monolithic System Technology, Inc. |
Fault-tolerant, high-speed bus system and bus interface for wafer-scale integration
|
CA2099737C
(en)
*
|
1992-09-08 |
1997-08-19 |
Terrence Kent Barrington |
Communications network test environment
|
US5633812A
(en)
*
|
1992-09-29 |
1997-05-27 |
International Business Machines Corporation |
Fault simulation of testing for board circuit failures
|
WO1994015311A1
(en)
*
|
1992-12-28 |
1994-07-07 |
Xilinx, Inc. |
Method for entering state flow diagrams using schematic editor programs
|
US5617327A
(en)
*
|
1993-07-30 |
1997-04-01 |
Xilinx, Inc. |
Method for entering state flow diagrams using schematic editor programs
|
JPH06282599A
(ja)
*
|
1993-03-26 |
1994-10-07 |
Hitachi Ltd |
論理検証方法および装置
|
JPH06282600A
(ja)
*
|
1993-03-29 |
1994-10-07 |
Mitsubishi Electric Corp |
論理シミュレーション装置
|
JP2815281B2
(ja)
*
|
1993-04-19 |
1998-10-27 |
株式会社ピーエフユー |
デジタル回路設計支援システムおよびその方法
|
US5751592A
(en)
*
|
1993-05-06 |
1998-05-12 |
Matsushita Electric Industrial Co., Ltd. |
Apparatus and method of supporting functional design of logic circuit and apparatus and method of verifying functional design of logic circuit
|
JP2768889B2
(ja)
*
|
1993-06-07 |
1998-06-25 |
株式会社東芝 |
論理シミュレーション装置
|
US5442644A
(en)
*
|
1993-07-01 |
1995-08-15 |
Unisys Corporation |
System for sensing the state of interconnection points
|
US5781447A
(en)
*
|
1993-08-13 |
1998-07-14 |
Micron Eletronics, Inc. |
System for recreating a printed circuit board from disjointly formatted data
|
US5530643A
(en)
*
|
1993-08-24 |
1996-06-25 |
Allen-Bradley Company, Inc. |
Method of programming industrial controllers with highly distributed processing
|
US5479355A
(en)
*
|
1993-09-14 |
1995-12-26 |
Hyduke; Stanley M. |
System and method for a closed loop operation of schematic designs with electrical hardware
|
US5680583A
(en)
|
1994-02-16 |
1997-10-21 |
Arkos Design, Inc. |
Method and apparatus for a trace buffer in an emulation system
|
JPH07249748A
(ja)
*
|
1994-03-14 |
1995-09-26 |
Fujitsu Ltd |
マスタースライス型lsiの設計装置
|
TW421761B
(en)
*
|
1994-04-12 |
2001-02-11 |
Yokogawa Electric Corp |
Verification support system
|
US5559718A
(en)
*
|
1994-04-28 |
1996-09-24 |
Cadence Design Systems, Inc. |
System and method for model-based verification of local design rules
|
US5752000A
(en)
*
|
1994-08-02 |
1998-05-12 |
Cadence Design Systems, Inc. |
System and method for simulating discrete functions using ordered decision arrays
|
US6208954B1
(en)
*
|
1994-09-16 |
2001-03-27 |
Wind River Systems, Inc. |
Method for scheduling event sequences
|
US5903469A
(en)
*
|
1994-11-08 |
1999-05-11 |
Synopsys, Inc. |
Method of extracting layout parasitics for nets of an integrated circuit using a connectivity-based approach
|
US5828580A
(en)
|
1994-11-08 |
1998-10-27 |
Epic Design Technology, Inc. |
Connectivity-based approach for extracting parasitic layout in an integrated circuit
|
JP3986571B2
(ja)
*
|
1994-12-09 |
2007-10-03 |
日本テキサス・インスツルメンツ株式会社 |
歩留り予測装置とその方法
|
US6393385B1
(en)
*
|
1995-02-07 |
2002-05-21 |
Texas Instruments Incorporated |
Knowledge driven simulation time and data reduction technique
|
US5706473A
(en)
*
|
1995-03-31 |
1998-01-06 |
Synopsys, Inc. |
Computer model of a finite state machine having inputs, outputs, delayed inputs and delayed outputs
|
JP3351651B2
(ja)
*
|
1995-04-07 |
2002-12-03 |
富士通株式会社 |
会話型回路設計装置
|
JP2940444B2
(ja)
*
|
1995-08-10 |
1999-08-25 |
ヤマハ株式会社 |
半導体集積回路のシミュレーション装置およびシミュレーション方法
|
JP3161314B2
(ja)
*
|
1996-01-19 |
2001-04-25 |
ヤマハ株式会社 |
論理シミュレーション装置および論理シミュレート方法
|
US5745389A
(en)
*
|
1996-04-04 |
1998-04-28 |
Bull Hn Information Systems Inc. |
System and mechanism for assigning pre-established electronic addresses to printed circuit boards
|
US6480995B1
(en)
|
1996-04-15 |
2002-11-12 |
Altera Corporation |
Algorithm and methodology for the polygonalization of sparse circuit schematics
|
US5819072A
(en)
*
|
1996-06-27 |
1998-10-06 |
Unisys Corporation |
Method of using a four-state simulator for testing integrated circuit designs having variable timing constraints
|
US6030110A
(en)
*
|
1996-06-28 |
2000-02-29 |
Lsi Logic Corporation |
Advanced modular cell placement system with median control and increase in resolution
|
US5892688A
(en)
*
|
1996-06-28 |
1999-04-06 |
Lsi Logic Corporation |
Advanced modular cell placement system with iterative one dimensional preplacement optimization
|
US6085032A
(en)
*
|
1996-06-28 |
2000-07-04 |
Lsi Logic Corporation |
Advanced modular cell placement system with sinusoidal optimization
|
US5870312A
(en)
*
|
1996-06-28 |
1999-02-09 |
Lsi Logic Corporation |
Advanced modular cell placement system with dispersion-driven levelizing system
|
US5867398A
(en)
*
|
1996-06-28 |
1999-02-02 |
Lsi Logic Corporation |
Advanced modular cell placement system with density driven capacity penalty system
|
US5872718A
(en)
*
|
1996-06-28 |
1999-02-16 |
Lsi Logic Corporation |
Advanced modular cell placement system
|
US5835381A
(en)
*
|
1996-06-28 |
1998-11-10 |
Lsi Logic Corporation |
Advanced modular cell placement system with minimizing maximal cut driven affinity system
|
US6067409A
(en)
*
|
1996-06-28 |
2000-05-23 |
Lsi Logic Corporation |
Advanced modular cell placement system
|
US5870311A
(en)
*
|
1996-06-28 |
1999-02-09 |
Lsi Logic Corporation |
Advanced modular cell placement system with fast procedure for finding a levelizing cut point
|
US5914888A
(en)
*
|
1996-06-28 |
1999-06-22 |
Lsi Logic Corporation |
Advanced modular cell placement system with coarse overflow remover
|
US6026223A
(en)
*
|
1996-06-28 |
2000-02-15 |
Scepanovic; Ranko |
Advanced modular cell placement system with overlap remover with minimal noise
|
US5831863A
(en)
*
|
1996-06-28 |
1998-11-03 |
Lsi Logic Corporation |
Advanced modular cell placement system with wire length driven affinity system
|
US5844811A
(en)
*
|
1996-06-28 |
1998-12-01 |
Lsi Logic Corporation |
Advanced modular cell placement system with universal affinity driven discrete placement optimization
|
US5963455A
(en)
*
|
1996-06-28 |
1999-10-05 |
Lsi Logic Corporation |
Advanced modular cell placement system with functional sieve optimization technique
|
US5812740A
(en)
*
|
1996-06-28 |
1998-09-22 |
Lsi Logic Corporation |
Advanced modular cell placement system with neighborhood system driven optimization
|
US5808899A
(en)
*
|
1996-06-28 |
1998-09-15 |
Lsi Logic Corporation |
Advanced modular cell placement system with cell placement crystallization
|
US5799172A
(en)
*
|
1996-09-10 |
1998-08-25 |
Motorola, Inc. |
Method of simulating an integrated circuit
|
US5841967A
(en)
|
1996-10-17 |
1998-11-24 |
Quickturn Design Systems, Inc. |
Method and apparatus for design verification using emulation and simulation
|
JPH10222374A
(ja)
|
1996-10-28 |
1998-08-21 |
Altera Corp |
遠隔ソフトウェア技術支援を提供するための方法
|
US5920490A
(en)
*
|
1996-12-26 |
1999-07-06 |
Adaptec, Inc. |
Integrated circuit test stimulus verification and vector extraction system
|
US6389379B1
(en)
|
1997-05-02 |
2002-05-14 |
Axis Systems, Inc. |
Converification system and method
|
US6009256A
(en)
*
|
1997-05-02 |
1999-12-28 |
Axis Systems, Inc. |
Simulation/emulation system and method
|
US6134516A
(en)
*
|
1997-05-02 |
2000-10-17 |
Axis Systems, Inc. |
Simulation server system and method
|
US6421251B1
(en)
|
1997-05-02 |
2002-07-16 |
Axis Systems Inc |
Array board interconnect system and method
|
US6321366B1
(en)
|
1997-05-02 |
2001-11-20 |
Axis Systems, Inc. |
Timing-insensitive glitch-free logic system and method
|
US6026230A
(en)
*
|
1997-05-02 |
2000-02-15 |
Axis Systems, Inc. |
Memory simulation system and method
|
US5960191A
(en)
|
1997-05-30 |
1999-09-28 |
Quickturn Design Systems, Inc. |
Emulation system with time-multiplexed interconnect
|
US5970240A
(en)
|
1997-06-25 |
1999-10-19 |
Quickturn Design Systems, Inc. |
Method and apparatus for configurable memory emulation
|
US6449659B1
(en)
|
1997-07-14 |
2002-09-10 |
Microsoft Corporation |
System for instance customization with application independent programming of controls
|
US6718534B1
(en)
|
1997-07-14 |
2004-04-06 |
Microsoft Corporation |
System for application independent programming of controls
|
US6102960A
(en)
*
|
1998-02-23 |
2000-08-15 |
Synopsys, Inc. |
Automatic behavioral model generation through physical component characterization and measurement
|
US6212665B1
(en)
|
1998-03-27 |
2001-04-03 |
Synopsys, Inc. |
Efficient power analysis method for logic cells with many output switchings
|
US6137546A
(en)
*
|
1998-07-20 |
2000-10-24 |
Sony Corporation |
Auto program feature for a television receiver
|
US7117461B1
(en)
*
|
1998-07-22 |
2006-10-03 |
Magma Design Automation, Inc. |
Method of estimating performance of integrated circuit designs using state point identification
|
US6321363B1
(en)
*
|
1999-01-11 |
2001-11-20 |
Novas Software Inc. |
Incremental simulation using previous simulation results and knowledge of changes to simulation model to achieve fast simulation time
|
US6353915B1
(en)
|
1999-04-01 |
2002-03-05 |
Unisys Corporation |
Methods for evaluating systems of electronic components
|
US6577992B1
(en)
|
1999-05-07 |
2003-06-10 |
Nassda Corporation |
Transistor level circuit simulator using hierarchical data
|
US6970815B1
(en)
*
|
1999-11-18 |
2005-11-29 |
Koninklijke Philips Electronics N.V. |
Method of discriminating between different types of scan failures, computer readable code to cause a display to graphically depict one or more simulated scan output data sets versus time and a computer implemented circuit simulation and fault detection system
|
GB2364798B
(en)
|
1999-12-03 |
2004-04-28 |
Sgs Thomson Microelectronics |
A processing method
|
US7130784B2
(en)
*
|
2001-08-29 |
2006-10-31 |
Intel Corporation |
Logic simulation
|
US20050138515A1
(en)
*
|
2003-11-05 |
2005-06-23 |
Hyduke Stanley M. |
Method and apparatus for co-verification of digital designs
|
US7818646B1
(en)
*
|
2003-11-12 |
2010-10-19 |
Hewlett-Packard Development Company, L.P. |
Expectation based event verification
|
CN100426304C
(zh)
*
|
2004-09-30 |
2008-10-15 |
华为技术有限公司 |
一种系统级电路审查方法及工具
|
US7240310B2
(en)
*
|
2004-12-07 |
2007-07-03 |
International Business Machines Corporation |
Method, system and program product for evaluating a circuit
|
EP1691309A1
(de)
*
|
2005-02-09 |
2006-08-16 |
Siemens Aktiengesellschaft |
Kontextsensitive Benutzerhilfe in einer softwarebasierten Entwicklungsumgebung
|
US7493519B2
(en)
*
|
2005-10-24 |
2009-02-17 |
Lsi Corporation |
RRAM memory error emulation
|
US8103469B1
(en)
*
|
2005-12-07 |
2012-01-24 |
Altera Corporation |
Transceiver link bit error rate prediction
|
WO2013051204A1
(ja)
*
|
2011-10-03 |
2013-04-11 |
パナソニック株式会社 |
動作確認支援装置および動作確認支援方法
|
US8543953B2
(en)
*
|
2012-01-04 |
2013-09-24 |
Apple Inc. |
Automated stimulus steering during simulation of an integrated circuit design
|
US9582389B2
(en)
*
|
2013-07-10 |
2017-02-28 |
International Business Machines Corporation |
Automated verification of appliance procedures
|
US9230050B1
(en)
|
2014-09-11 |
2016-01-05 |
The United States Of America, As Represented By The Secretary Of The Air Force |
System and method for identifying electrical properties of integrate circuits
|
US10769328B2
(en)
*
|
2017-09-30 |
2020-09-08 |
Texas Instruments Incorporated |
Generating a template-driven schematic from a netlist of electronic circuits
|
WO2020014490A1
(en)
*
|
2018-07-11 |
2020-01-16 |
The Board Of Trustees Of The Leland Stanford Junior University |
Systems and methods for generative models for design
|
CN111177987B
(zh)
*
|
2019-12-20 |
2023-09-22 |
北京天下行知科技有限公司 |
对集成电路设计进行分析的方法、装置、终端及存储介质
|
CN111221690B
(zh)
*
|
2019-12-20 |
2023-09-22 |
北京天下行知科技有限公司 |
针对集成电路设计的模型确定方法、装置及终端
|
US11796794B2
(en)
|
2020-05-12 |
2023-10-24 |
The Board Of Trustees Of The Leland Stanford Junior University |
Multi-objective, robust constraints enforced global topology optimizer for optical devices
|