DE69121292T2 - Datenverarbeitungsgerät mit Prüfsteuerschaltung - Google Patents

Datenverarbeitungsgerät mit Prüfsteuerschaltung

Info

Publication number
DE69121292T2
DE69121292T2 DE69121292T DE69121292T DE69121292T2 DE 69121292 T2 DE69121292 T2 DE 69121292T2 DE 69121292 T DE69121292 T DE 69121292T DE 69121292 T DE69121292 T DE 69121292T DE 69121292 T2 DE69121292 T2 DE 69121292T2
Authority
DE
Germany
Prior art keywords
control circuit
data processing
processing device
test control
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69121292T
Other languages
English (en)
Other versions
DE69121292D1 (de
Inventor
Makoto Shinohara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69121292D1 publication Critical patent/DE69121292D1/de
Application granted granted Critical
Publication of DE69121292T2 publication Critical patent/DE69121292T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/28—Error detection; Error correction; Monitoring by checking the correct order of processing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
DE69121292T 1990-05-16 1991-05-02 Datenverarbeitungsgerät mit Prüfsteuerschaltung Expired - Fee Related DE69121292T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2124037A JP2619112B2 (ja) 1990-05-16 1990-05-16 情報処理装置のテスト容易化回路

Publications (2)

Publication Number Publication Date
DE69121292D1 DE69121292D1 (de) 1996-09-19
DE69121292T2 true DE69121292T2 (de) 1997-02-06

Family

ID=14875463

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69121292T Expired - Fee Related DE69121292T2 (de) 1990-05-16 1991-05-02 Datenverarbeitungsgerät mit Prüfsteuerschaltung

Country Status (5)

Country Link
US (1) US5363380A (de)
EP (1) EP0457115B1 (de)
JP (1) JP2619112B2 (de)
KR (1) KR950009691B1 (de)
DE (1) DE69121292T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233352A (ja) * 1992-02-19 1993-09-10 Nec Corp マイクロプロセッサ
FR2697356B1 (fr) * 1992-10-22 1994-12-09 Sagem Circuit intégré à la demande à microprocesseur.
US5432464A (en) * 1993-09-29 1995-07-11 Societe D'applications Generales D'electricite Et De Mecanique Sagem Application specific integrated circuit including a microprocessor for customized functions as defined by the user
JPH07110803A (ja) * 1993-10-13 1995-04-25 Nec Corp シングルチップマイクロコンピュータ
JP4899248B2 (ja) * 2001-04-02 2012-03-21 富士通セミコンダクター株式会社 半導体集積回路
US7673177B2 (en) * 2003-07-01 2010-03-02 Samsung Electronics Co., Ltd. Circuit and method for providing PCB power-on self test capability for peripheral devices
JP2005316643A (ja) * 2004-04-28 2005-11-10 Fuji Xerox Co Ltd 無線データ送受信システムのｃｐｕエミュレータ
CN104182316A (zh) * 2013-05-22 2014-12-03 鸿富锦精密工业(武汉)有限公司 转换装置
CN104216464A (zh) * 2013-05-31 2014-12-17 鸿富锦精密工业(武汉)有限公司 转换装置
JP6241323B2 (ja) * 2014-03-06 2017-12-06 富士通株式会社 スイッチ装置、情報処理装置、情報処理装置の制御方法および情報処理装置の制御プログラム

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3921142A (en) * 1973-09-24 1975-11-18 Texas Instruments Inc Electronic calculator chip having test input and output
US4334268A (en) * 1979-05-01 1982-06-08 Motorola, Inc. Microcomputer with branch on bit set/clear instructions
US4878168A (en) * 1984-03-30 1989-10-31 International Business Machines Corporation Bidirectional serial test bus device adapted for control processing unit using parallel information transfer bus
JPS60207942A (ja) * 1984-03-30 1985-10-19 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 記憶コントロ−ラおよび記憶装置検査装置
US4654804A (en) * 1984-07-23 1987-03-31 Texas Instruments Incorporated Video system with XY addressing capabilities
US5032783A (en) * 1985-10-23 1991-07-16 Texas Instruments Incorporated Test circuit and scan tested logic device with isolated data lines during testing
JPH0821028B2 (ja) * 1986-04-23 1996-03-04 株式会社日立製作所 デ−タ処理装置
JPS6349870A (ja) * 1986-08-19 1988-03-02 Mitsubishi Electric Corp マイクロコンピユ−タ
KR880014482A (ko) * 1987-05-27 1988-12-24 미다 가쓰시게 반도체 집적회로 장치
JP2760157B2 (ja) * 1991-01-23 1998-05-28 日本電気株式会社 Ｌｓｉテスト方法

Also Published As

Publication number Publication date
DE69121292D1 (de) 1996-09-19
KR950009691B1 (ko) 1995-08-26
JPH0424749A (ja) 1992-01-28
JP2619112B2 (ja) 1997-06-11
US5363380A (en) 1994-11-08
EP0457115A3 (en) 1992-11-04
EP0457115B1 (de) 1996-08-14
KR910020556A (ko) 1991-12-20
EP0457115A2 (de) 1991-11-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee