DE69121501D1 - Mehrschichtige Leiterplatte und Verfahren zu ihrer Herstellung - Google Patents

Mehrschichtige Leiterplatte und Verfahren zu ihrer Herstellung

Info

Publication number
DE69121501D1
DE69121501D1 DE69121501T DE69121501T DE69121501D1 DE 69121501 D1 DE69121501 D1 DE 69121501D1 DE 69121501 T DE69121501 T DE 69121501T DE 69121501 T DE69121501 T DE 69121501T DE 69121501 D1 DE69121501 D1 DE 69121501D1
Authority
DE
Germany
Prior art keywords
manufacture
circuit board
printed circuit
multilayer printed
multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Revoked
Application number
DE69121501T
Other languages
English (en)
Other versions
DE69121501T2 (de
Inventor
Yutaka Tsukada
Shuhei Tsuchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=17279130&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69121501(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69121501D1 publication Critical patent/DE69121501D1/de
Application granted granted Critical
Publication of DE69121501T2 publication Critical patent/DE69121501T2/de
Anticipated expiration legal-status Critical
Revoked legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0263High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H05K1/0265High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0352Differences between the conductors of different layers of a multilayer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09327Special sequence of power, ground and signal layers in multilayer PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09509Blind vias, i.e. vias having one side closed
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1438Treating holes after another process, e.g. coating holes after coating the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1581Treating the backside of the PCB, e.g. for heating during soldering or providing a liquid coating on the backside
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0023Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base
DE69121501T 1990-09-27 1991-09-25 Mehrschichtige Leiterplatte und Verfahren zu ihrer Herstellung Revoked DE69121501T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2255464A JP2739726B2 (ja) 1990-09-27 1990-09-27 多層プリント回路板

Publications (2)

Publication Number Publication Date
DE69121501D1 true DE69121501D1 (de) 1996-09-26
DE69121501T2 DE69121501T2 (de) 1997-02-06

Family

ID=17279130

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69121501T Revoked DE69121501T2 (de) 1990-09-27 1991-09-25 Mehrschichtige Leiterplatte und Verfahren zu ihrer Herstellung

Country Status (4)

Country Link
US (2) US5451721A (de)
EP (1) EP0478313B1 (de)
JP (1) JP2739726B2 (de)
DE (1) DE69121501T2 (de)

Families Citing this family (139)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2739726B2 (ja) 1990-09-27 1998-04-15 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層プリント回路板
US5517758A (en) * 1992-05-29 1996-05-21 Matsushita Electric Industrial Co., Ltd. Plating method and method for producing a multi-layered printed wiring board using the same
US5532105A (en) * 1992-08-07 1996-07-02 Hitachi Chemical Company, Ltd. Photolithographically viahole-forming photosensitive element comprising two photosensitive layers for the fabrication process of multilayer wiring board
US5480048A (en) * 1992-09-04 1996-01-02 Hitachi, Ltd. Multilayer wiring board fabricating method
DE69303684T2 (de) * 1992-09-29 1996-11-28 Matsushita Electric Ind Co Ltd Verfahren zur Herstellung einer mehrschichtigen Leiterplatte
JPH06169175A (ja) * 1992-11-30 1994-06-14 Nec Corp 多層印刷配線板及びその製造方法
DE59208900D1 (de) * 1992-12-12 1997-10-16 Ibm Leiterplatten mit lokal erhöhter Verdrahtungsdichte und Herstellungsverfahren für solche Leiterplatten
DE59208335D1 (de) * 1992-12-14 1997-05-15 Ibm Leiterplatten mit lokal erhöhter Verdrahtungsdichte und konischen Bohrungen sowie Herstellungsverfahren für solche Leiterplatten
US5597983A (en) * 1994-02-03 1997-01-28 Sgs-Thomson Microelectronics, Inc. Process of removing polymers in semiconductor vias
DE4422669A1 (de) * 1994-06-30 1996-01-04 Siemens Ag Mehrlagen-Leiterplatte
JP3121213B2 (ja) * 1994-07-27 2000-12-25 株式会社日立製作所 感光性樹脂組成物
JP3592827B2 (ja) * 1996-03-06 2004-11-24 富士写真フイルム株式会社 感光性エレメント及び多層配線基板の製造方法
DE19612760C2 (de) * 1996-03-29 2002-01-10 Oce Printing Systems Gmbh Trägerplatte und Druckkopf mit dieser Trägerplatte
US5822856A (en) * 1996-06-28 1998-10-20 International Business Machines Corporation Manufacturing circuit board assemblies having filled vias
EP0824301A3 (de) * 1996-08-09 1999-08-11 Hitachi, Ltd. Gedruckte Schaltungsplatte, Chipkarte, und Verfahren zu deren Herstellung
US5981880A (en) * 1996-08-20 1999-11-09 International Business Machines Corporation Electronic device packages having glass free non conductive layers
US6074728A (en) * 1996-09-11 2000-06-13 Samsung Aerospace Industries, Ltd. Multi-layered circuit substrate
US5955192A (en) * 1996-11-20 1999-09-21 Shin-Etsu Chemical Co., Ltd. Conductive circuit board and method for making
US6105243A (en) * 1996-12-05 2000-08-22 International Business Machines, Corp. Method of fabricating multilayer printed circuit board
US6820330B1 (en) * 1996-12-13 2004-11-23 Tessera, Inc. Method for forming a multi-layer circuit assembly
ID19337A (id) 1996-12-26 1998-07-02 Ajinomoto Kk Film perekat antar-pelapis untuk papan pembuat kabel cetakan berlapis-banyak dan papan kabel cetakan berlapis-banyak memakai film ini
US5990421A (en) * 1997-02-18 1999-11-23 Intel Corporation Built in board resistors
US6255039B1 (en) 1997-04-16 2001-07-03 Isola Laminate Systems Corp. Fabrication of high density multilayer interconnect printed circuit boards
US6162997A (en) * 1997-06-03 2000-12-19 International Business Machines Corporation Circuit board with primary and secondary through holes
DE19729587A1 (de) * 1997-07-10 1999-01-14 Siemens Ag Verfahren zum Aufbringen von Lot auf Anschlußflächen einer Leiterplatte, Verfahren zur Herstellung eines mit Lot beschichteten Trägers für ein derartiges Verfahren sowie ein derartiger Träger
US6141870A (en) 1997-08-04 2000-11-07 Peter K. Trzyna Method for making electrical device
US6388202B1 (en) 1997-10-06 2002-05-14 Motorola, Inc. Multi layer printed circuit board
CN100521883C (zh) * 1997-12-11 2009-07-29 伊比登株式会社 多层印刷电路板的制造方法
US6462107B1 (en) 1997-12-23 2002-10-08 The Texas A&M University System Photoimageable compositions and films for printed wiring board manufacture
US6606286B1 (en) 1998-01-05 2003-08-12 Mitburri Electric Co., Ltd Tln signal generating apparatus used in optical disc drive and optical disc drive equipped with the apparatus, and optical disc drive equipped with amplitude adjusting apparatus for tracking error signal
US6131279A (en) * 1998-01-08 2000-10-17 International Business Machines Corporation Integrated manufacturing packaging process
US6518160B1 (en) * 1998-02-05 2003-02-11 Tessera, Inc. Method of manufacturing connection components using a plasma patterned mask
TW505804B (en) * 1998-02-19 2002-10-11 Hitachi Ltd Liquid crystal display device
US6119338A (en) * 1998-03-19 2000-09-19 Industrial Technology Research Institute Method for manufacturing high-density multilayer printed circuit boards
US6720501B1 (en) * 1998-04-14 2004-04-13 Formfactor, Inc. PC board having clustered blind vias
US6085415A (en) * 1998-07-27 2000-07-11 Ormet Corporation Methods to produce insulated conductive through-features in core materials for electric packaging
US6440641B1 (en) 1998-07-31 2002-08-27 Kulicke & Soffa Holdings, Inc. Deposited thin film build-up layer dimensions as a method of relieving stress in high density interconnect printed wiring board substrates
KR100642167B1 (ko) 1998-09-18 2006-11-02 훈츠만 어드밴스트 머티리얼스(스위처랜드)게엠베하 다층 회로의 제조방법
MY139405A (en) * 1998-09-28 2009-09-30 Ibiden Co Ltd Printed circuit board and method for its production
US6156221A (en) * 1998-10-02 2000-12-05 International Business Machines Corporation Copper etching compositions, processes and products derived therefrom
US6175088B1 (en) * 1998-10-05 2001-01-16 Avaya Technology Corp. Multi-layer printed-wiring boards with inner power and ground layers
US6120693A (en) * 1998-11-06 2000-09-19 Alliedsignal Inc. Method of manufacturing an interlayer via and a laminate precursor useful for same
US6201194B1 (en) * 1998-12-02 2001-03-13 International Business Machines Corporation Multi-voltage plane, multi-signal plane circuit card with photoimageable dielectric
US6181004B1 (en) 1999-01-22 2001-01-30 Jerry D. Koontz Digital signal processing assembly and test method
JP3635219B2 (ja) * 1999-03-11 2005-04-06 新光電気工業株式会社 半導体装置用多層基板及びその製造方法
US6048656A (en) * 1999-05-11 2000-04-11 Micron Technology, Inc. Void-free underfill of surface mounted chips
JP2000357873A (ja) 1999-06-17 2000-12-26 Hitachi Ltd 多層配線基板及びその製造方法
US6285081B1 (en) 1999-07-13 2001-09-04 Micron Technology, Inc. Deflectable interconnect
EP1087261A1 (de) 1999-09-24 2001-03-28 Sumitomo Bakelite Company Limited Fotoempfindliche Harzzusammensetzung, mehrschichtige gedruckte Leiterplatte und Verfahren zu deren Herstellung
DE50002499D1 (de) 1999-09-30 2003-07-10 Siemens Ag Verfahren und einrichtung zum laserbohren von organischen materialien
JP3617388B2 (ja) * 1999-10-20 2005-02-02 日本電気株式会社 プリント配線板及びその製造方法
US6711813B1 (en) * 1999-11-05 2004-03-30 Interuniversitair Microelektronica Centrum Method for fabricating a thin film build-up structure on a sequentially laminated printed circuit board base
JP2001237512A (ja) * 1999-12-14 2001-08-31 Nitto Denko Corp 両面回路基板およびこれを用いた多層配線基板ならびに両面回路基板の製造方法
US6698093B2 (en) * 1999-12-15 2004-03-02 Matsushita Electric Industrial Co., Ltd. Method of manufacturing circuit forming board to improve adhesion of a circuit to the circuit forming board
US20020144397A1 (en) * 2000-01-21 2002-10-10 Morris Terrel L. Subtractive process for fabricating cylindrical printed circuit boards
JP2001251040A (ja) * 2000-03-06 2001-09-14 Stanley Electric Co Ltd 高周波用回路基板及びその製造方法
US6467160B1 (en) * 2000-03-28 2002-10-22 International Business Machines Corporation Fine pitch circuitization with unfilled plated through holes
JP2001274537A (ja) * 2000-03-28 2001-10-05 Ngk Spark Plug Co Ltd 配線基板及び配線基板の製造方法
JP2001284783A (ja) * 2000-03-30 2001-10-12 Shinko Electric Ind Co Ltd 表面実装用基板及び表面実装構造
JP2001284813A (ja) * 2000-03-31 2001-10-12 Mitsubishi Electric Corp 多層配線板の製造方法
US6944945B1 (en) * 2000-05-12 2005-09-20 Shipley Company, L.L.C. Sequential build circuit board
JP2001332859A (ja) * 2000-05-22 2001-11-30 Murata Mfg Co Ltd 積層型セラミック電子部品およびその製造方法ならびに電子装置
US6740246B2 (en) * 2000-05-26 2004-05-25 Visteon Global Tech., Inc. Circuit board and a method for making the same
US6584682B2 (en) * 2000-05-26 2003-07-01 Visteon Global Tech., Inc. Method for making circuit board
US6454154B1 (en) 2000-05-31 2002-09-24 Honeywell Advanced Circuits, Inc. Filling device
US6800232B2 (en) * 2000-05-31 2004-10-05 Ttm Advanced Circuits, Inc. PCB support plate method for PCB via fill
AU2001264968A1 (en) 2000-05-31 2001-12-11 Honeywell International, Inc. Filling device
US6855385B2 (en) * 2000-05-31 2005-02-15 Ttm Advanced Circuits, Inc. PCB support plate for PCB via fill
WO2001093647A2 (en) * 2000-05-31 2001-12-06 Honeywell International Inc. Filling method
US6506332B2 (en) 2000-05-31 2003-01-14 Honeywell International Inc. Filling method
US6388890B1 (en) * 2000-06-19 2002-05-14 Nortel Networks Limited Technique for reducing the number of layers in a multilayer circuit board
US7069646B2 (en) * 2000-06-19 2006-07-04 Nortel Networks Limited Techniques for reducing the number of layers in a multilayer signal routing device
US20040212103A1 (en) * 2000-06-19 2004-10-28 Herman Kwong Techniques for pin arrangements in circuit chips
US7256354B2 (en) * 2000-06-19 2007-08-14 Wyrzykowska Aneta O Technique for reducing the number of layers in a multilayer circuit board
US7725860B1 (en) 2000-06-19 2010-05-25 Herman Kwong Contact mapping using channel routing
US7281326B1 (en) 2000-06-19 2007-10-16 Nortel Network Limited Technique for routing conductive traces between a plurality of electronic components of a multilayer signal routing device
US7107673B2 (en) * 2000-06-19 2006-09-19 Nortel Networks Limited Technique for accommodating electronic components on a multiplayer signal routing device
US7259336B2 (en) 2000-06-19 2007-08-21 Nortel Networks Limited Technique for improving power and ground flooding
US7069650B2 (en) * 2000-06-19 2006-07-04 Nortel Networks Limited Method for reducing the number of layers in a multilayer signal routing device
TW496111B (en) 2000-08-24 2002-07-21 Ind Tech Res Inst Method of forming contact hole on multi-level circuit board
US6644983B2 (en) 2001-02-09 2003-11-11 International Business Machines Corporation Contact assembly, connector assembly utilizing same, and electronic assembly
JP3760101B2 (ja) * 2001-02-13 2006-03-29 富士通株式会社 多層プリント配線板およびその製造方法
US6465084B1 (en) * 2001-04-12 2002-10-15 International Business Machines Corporation Method and structure for producing Z-axis interconnection assembly of printed wiring board elements
US6759600B2 (en) * 2001-04-27 2004-07-06 Shinko Electric Industries Co., Ltd. Multilayer wiring board and method of fabrication thereof
JP4034046B2 (ja) * 2001-06-07 2008-01-16 日本碍子株式会社 高精度な貫通孔を有する多層板、及び、回路基板
US6930256B1 (en) * 2002-05-01 2005-08-16 Amkor Technology, Inc. Integrated circuit substrate having laser-embedded conductive patterns and method therefor
JP3461172B2 (ja) * 2001-07-05 2003-10-27 日東電工株式会社 多層配線回路基板の製造方法
JP2003023248A (ja) * 2001-07-05 2003-01-24 Nitto Denko Corp 多層フレキシブル配線回路基板およびその製造方法
TWI312166B (en) 2001-09-28 2009-07-11 Toppan Printing Co Ltd Multi-layer circuit board, integrated circuit package, and manufacturing method for multi-layer circuit board
TWI286826B (en) * 2001-12-28 2007-09-11 Via Tech Inc Semiconductor package substrate and process thereof
US6747216B2 (en) * 2002-02-04 2004-06-08 Intel Corporation Power-ground plane partitioning and via connection to utilize channel/trenches for power delivery
US6701614B2 (en) * 2002-02-15 2004-03-09 Advanced Semiconductor Engineering Inc. Method for making a build-up package of a semiconductor
US7358607B2 (en) * 2002-03-06 2008-04-15 Intel Corporation Substrates and systems to minimize signal path discontinuities
US9691635B1 (en) 2002-05-01 2017-06-27 Amkor Technology, Inc. Buildup dielectric layer having metallization pattern semiconductor package fabrication method
US7548430B1 (en) 2002-05-01 2009-06-16 Amkor Technology, Inc. Buildup dielectric and metallization process and semiconductor package
US7399661B2 (en) * 2002-05-01 2008-07-15 Amkor Technology, Inc. Method for making an integrated circuit substrate having embedded back-side access conductors and vias
US20080043447A1 (en) * 2002-05-01 2008-02-21 Amkor Technology, Inc. Semiconductor package having laser-embedded terminals
US7670962B2 (en) 2002-05-01 2010-03-02 Amkor Technology, Inc. Substrate having stiffener fabrication method
JP3822549B2 (ja) * 2002-09-26 2006-09-20 富士通株式会社 配線基板
TW573332B (en) * 2002-11-29 2004-01-21 Via Tech Inc Lamination process and structure
US6936502B2 (en) * 2003-05-14 2005-08-30 Nortel Networks Limited Package modification for channel-routed circuit boards
JP2005054240A (ja) 2003-08-05 2005-03-03 Fuji Photo Film Co Ltd 導電性フィルムおよびその作製方法
US8569142B2 (en) * 2003-11-28 2013-10-29 Blackberry Limited Multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same
US11081370B2 (en) 2004-03-23 2021-08-03 Amkor Technology Singapore Holding Pte. Ltd. Methods of manufacturing an encapsulated semiconductor device
US10811277B2 (en) 2004-03-23 2020-10-20 Amkor Technology, Inc. Encapsulated semiconductor package
US7270845B2 (en) * 2004-03-31 2007-09-18 Endicott Interconnect Technologies, Inc. Dielectric composition for forming dielectric layer for use in circuitized substrates
US7078816B2 (en) * 2004-03-31 2006-07-18 Endicott Interconnect Technologies, Inc. Circuitized substrate
US7145221B2 (en) * 2004-03-31 2006-12-05 Endicott Interconnect Technologies, Inc. Low moisture absorptive circuitized substrate, method of making same, electrical assembly utilizing same, and information handling system utilizing same
WO2005124425A2 (en) * 2004-06-22 2005-12-29 Bae Systems Plc Improvements relating to deformable mirrors
KR100645643B1 (ko) * 2004-07-14 2006-11-15 삼성전기주식회사 수동소자칩 내장형의 인쇄회로기판의 제조방법
US7202419B2 (en) * 2004-07-20 2007-04-10 Dragonwave Inc. Multi-layer integrated RF/IF circuit board including a central non-conductive layer
US7196274B2 (en) * 2004-07-20 2007-03-27 Dragonwave Inc. Multi-layer integrated RF/IF circuit board
US8826531B1 (en) 2005-04-05 2014-09-09 Amkor Technology, Inc. Method for making an integrated circuit substrate having laminated laser-embedded circuit layers
JP2006332312A (ja) * 2005-05-26 2006-12-07 Three M Innovative Properties Co 可撓性プリント回路基板用基材のビアホール形成方法
KR100733253B1 (ko) * 2005-11-18 2007-06-27 삼성전기주식회사 고밀도 인쇄회로기판 및 그 제조방법
US20070245552A1 (en) * 2006-04-07 2007-10-25 John Caldwell Probe interposers and methods of fabricating probe interposers
US7589398B1 (en) 2006-10-04 2009-09-15 Amkor Technology, Inc. Embedded metal features structure
US7752752B1 (en) 2007-01-09 2010-07-13 Amkor Technology, Inc. Method of fabricating an embedded circuit pattern
US8723047B2 (en) * 2007-03-23 2014-05-13 Huawei Technologies Co., Ltd. Printed circuit board, design method thereof and mainboard of terminal product
US20080280463A1 (en) * 2007-05-09 2008-11-13 Mercury Computer Systems, Inc. Rugged Chip Packaging
CN101340775B (zh) * 2007-07-06 2010-06-09 鸿富锦精密工业(深圳)有限公司 软性电路板及其制造方法
JP2011501473A (ja) * 2007-10-26 2011-01-06 イー・アイ・デュポン・ドウ・ヌムール・アンド・カンパニー 多層チップキャリアおよび製造方法
US7759787B2 (en) * 2007-11-06 2010-07-20 International Business Machines Corporation Packaging substrate having pattern-matched metal layers
JP5374079B2 (ja) * 2008-06-20 2013-12-25 東京エレクトロン株式会社 検査用接触構造体
TWI373836B (en) * 2008-09-23 2012-10-01 Advanced Semiconductor Eng Circuit board and process thereof
JP4730426B2 (ja) 2008-11-19 2011-07-20 ソニー株式会社 実装基板及び半導体モジュール
US8872329B1 (en) 2009-01-09 2014-10-28 Amkor Technology, Inc. Extended landing pad substrate package structure and method
US9433105B2 (en) 2009-08-25 2016-08-30 International Business Machines Corporation Method of fabricating printed circuit boards
US8289727B2 (en) 2010-06-11 2012-10-16 Taiwan Semiconductor Manufacturing Company, Ltd. Package substrate
JP5170174B2 (ja) * 2010-06-28 2013-03-27 株式会社村田製作所 モジュール
KR20120035007A (ko) * 2010-10-04 2012-04-13 삼성전기주식회사 인쇄회로기판의 제조방법
WO2013145043A1 (ja) 2012-03-27 2013-10-03 パナソニック株式会社 ビルドアップ基板およびその製造方法ならびに半導体集積回路パッケージ
CN103889140A (zh) * 2012-12-20 2014-06-25 深圳市共进电子股份有限公司 双面印刷电路板的布线方法
TWI462669B (zh) * 2013-02-08 2014-11-21 Ichia Tech Inc 多層式的軟性印刷電路板及其製造方法
JP2016072334A (ja) * 2014-09-29 2016-05-09 日本ゼオン株式会社 積層体の製造方法
JP6786372B2 (ja) * 2016-12-09 2020-11-18 新光電気工業株式会社 配線基板、配線基板の製造方法
WO2019098011A1 (ja) * 2017-11-16 2019-05-23 株式会社村田製作所 樹脂多層基板、電子部品およびその実装構造
CN213522492U (zh) * 2017-11-16 2021-06-22 株式会社村田制作所 树脂多层基板、电子部件及其安装构造
US11824013B2 (en) 2019-08-15 2023-11-21 Intel Corporation Package substrate with reduced interconnect stress

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2202077A1 (de) * 1971-05-17 1972-11-30 Hochvakuum Dresden Veb Verfahren zur Herstellung von Mehrlagenleiterplatten
IT951496B (it) 1971-06-28 1973-06-30 Ibm Composizione fotoresistente posi tiva a base epossidica partico larmente per la stampa di micro circuiti
JPS60180197A (ja) * 1984-02-27 1985-09-13 宇部興産株式会社 多層プリント配線板の製造方法
JPS61220499A (ja) * 1985-03-27 1986-09-30 株式会社日立製作所 混成多層配線基板
US4902610A (en) 1985-08-02 1990-02-20 Shipley Company Inc. Method for manufacture of multilayer circuit board
US4642160A (en) 1985-08-12 1987-02-10 Interconnect Technology Inc. Multilayer circuit board manufacturing
DE3605474A1 (de) 1986-02-20 1987-08-27 Siemens Ag Mehrlagen-leiterplatte
JPH0716094B2 (ja) * 1986-03-31 1995-02-22 日立化成工業株式会社 配線板の製造法
JPH081985B2 (ja) * 1987-03-31 1996-01-10 日立化成工業株式会社 配線板の製造方法
US4882454A (en) * 1988-02-12 1989-11-21 Texas Instruments Incorporated Thermal interface for a printed wiring board
US4806188A (en) * 1988-03-04 1989-02-21 E. I. Du Pont De Nemours And Company Method for fabricating multilayer circuits
DE3840207A1 (de) * 1988-11-29 1990-05-31 Draegerwerk Ag Verfahren zur herstellung einer leiterplatte mit mehreren leiterbahnebenen und entsprechende multilayer-leiterplatte
US4904968A (en) * 1989-04-07 1990-02-27 Tektronix, Inc. Circuit board configuration for reducing signal distortion
US5010641A (en) * 1989-06-30 1991-04-30 Unisys Corp. Method of making multilayer printed circuit board
JP2739726B2 (ja) 1990-09-27 1998-04-15 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン 多層プリント回路板

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EP0478313B1 (de) 1996-08-21
EP0478313A3 (en) 1993-01-27
DE69121501T2 (de) 1997-02-06
US6378201B1 (en) 2002-04-30
US5451721A (en) 1995-09-19
JPH04148590A (ja) 1992-05-21
EP0478313A2 (de) 1992-04-01

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