DE69121657T2 - Halbleiterspeicheranordnung mit einem Absenktransistor für externes Signal - Google Patents
Halbleiterspeicheranordnung mit einem Absenktransistor für externes SignalInfo
- Publication number
- DE69121657T2 DE69121657T2 DE69121657T DE69121657T DE69121657T2 DE 69121657 T2 DE69121657 T2 DE 69121657T2 DE 69121657 T DE69121657 T DE 69121657T DE 69121657 T DE69121657 T DE 69121657T DE 69121657 T2 DE69121657 T2 DE 69121657T2
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor memory
- external signal
- down transistor
- memory arrangement
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2243085A JPH04123388A (ja) | 1990-09-13 | 1990-09-13 | 半導体メモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69121657D1 DE69121657D1 (de) | 1996-10-02 |
DE69121657T2 true DE69121657T2 (de) | 1997-02-06 |
Family
ID=17098561
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69121657T Expired - Lifetime DE69121657T2 (de) | 1990-09-13 | 1991-09-13 | Halbleiterspeicheranordnung mit einem Absenktransistor für externes Signal |
Country Status (5)
Country | Link |
---|---|
US (1) | US5285412A (de) |
EP (1) | EP0475448B1 (de) |
JP (1) | JPH04123388A (de) |
KR (1) | KR950006420B1 (de) |
DE (1) | DE69121657T2 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5757712A (en) * | 1996-07-12 | 1998-05-26 | International Business Machines Corporation | Memory modules with voltage regulation and level translation |
JP3804633B2 (ja) * | 2003-05-28 | 2006-08-02 | セイコーエプソン株式会社 | 半導体集積回路 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4216390A (en) * | 1978-10-04 | 1980-08-05 | Rca Corporation | Level shift circuit |
US4482985A (en) * | 1981-04-17 | 1984-11-13 | Hitachi, Ltd. | Semiconductor integrated circuit |
JPS5990292A (ja) * | 1982-11-12 | 1984-05-24 | Toshiba Corp | 電圧変換回路 |
JPS6052112A (ja) * | 1983-08-31 | 1985-03-25 | Toshiba Corp | 論理回路 |
NL8702800A (nl) * | 1987-11-23 | 1989-06-16 | Philips Nv | Geintegreerde geheugenschakeling met interne voedingsspanningsregeling. |
US4820941A (en) * | 1988-02-01 | 1989-04-11 | Texas Instruments Incorporated | Decoder driver circuit for programming high-capacitance lines |
JP2585348B2 (ja) * | 1988-02-22 | 1997-02-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JPH02246516A (ja) * | 1989-03-20 | 1990-10-02 | Hitachi Ltd | 半導体装置 |
US5084637A (en) * | 1989-05-30 | 1992-01-28 | International Business Machines Corp. | Bidirectional level shifting interface circuit |
-
1990
- 1990-09-13 JP JP2243085A patent/JPH04123388A/ja active Pending
-
1991
- 1991-09-10 KR KR1019910015759A patent/KR950006420B1/ko not_active IP Right Cessation
- 1991-09-13 DE DE69121657T patent/DE69121657T2/de not_active Expired - Lifetime
- 1991-09-13 EP EP91115593A patent/EP0475448B1/de not_active Expired - Lifetime
- 1991-09-13 US US07/759,294 patent/US5285412A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0475448B1 (de) | 1996-08-28 |
KR920007172A (ko) | 1992-04-28 |
DE69121657D1 (de) | 1996-10-02 |
JPH04123388A (ja) | 1992-04-23 |
KR950006420B1 (ko) | 1995-06-15 |
EP0475448A2 (de) | 1992-03-18 |
EP0475448A3 (en) | 1992-10-14 |
US5285412A (en) | 1994-02-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC CORP., TOKIO/TOKYO, JP Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: ELPIDA MEMORY, INC., TOKYO, JP |