DE69124711D1 - Halbleiter-Speichereinrichtung - Google Patents
Halbleiter-SpeichereinrichtungInfo
- Publication number
- DE69124711D1 DE69124711D1 DE69124711T DE69124711T DE69124711D1 DE 69124711 D1 DE69124711 D1 DE 69124711D1 DE 69124711 T DE69124711 T DE 69124711T DE 69124711 T DE69124711 T DE 69124711T DE 69124711 D1 DE69124711 D1 DE 69124711D1
- Authority
- DE
- Germany
- Prior art keywords
- storage device
- semiconductor storage
- semiconductor
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2105908A JP2723338B2 (ja) | 1990-04-21 | 1990-04-21 | 半導体メモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69124711D1 true DE69124711D1 (de) | 1997-03-27 |
DE69124711T2 DE69124711T2 (de) | 1997-07-03 |
Family
ID=14419971
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69124711T Expired - Lifetime DE69124711T2 (de) | 1990-04-21 | 1991-04-19 | Halbleiter-Speichereinrichtung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5355331A (de) |
EP (1) | EP0453997B1 (de) |
JP (1) | JP2723338B2 (de) |
KR (1) | KR950006425B1 (de) |
DE (1) | DE69124711T2 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3280704B2 (ja) * | 1992-05-29 | 2002-05-13 | 株式会社東芝 | 半導体記憶装置 |
EP0691612A1 (de) * | 1994-07-07 | 1996-01-10 | International Business Machines Corporation | Prüfungsschaltkreis eingebetteter Speichermatrizen in gemischter Logistik und Speicherchips |
JP2931776B2 (ja) * | 1995-08-21 | 1999-08-09 | 三菱電機株式会社 | 半導体集積回路 |
US5754468A (en) * | 1996-06-26 | 1998-05-19 | Simon Fraser University | Compact multiport static random access memory cell |
US5745405A (en) * | 1996-08-26 | 1998-04-28 | Taiwan Semiconductor Manufacturing Company, Ltd | Process leakage evaluation and measurement method |
US6208567B1 (en) * | 1997-01-31 | 2001-03-27 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device capable of cutting off a leakage current in a defective array section |
US5764581A (en) * | 1997-03-04 | 1998-06-09 | Advanced Micro Devices Inc. | Dynamic ram with two-transistor cell |
TW573288B (en) | 2001-09-28 | 2004-01-21 | Sony Corp | Display memory, drive circuit, display and portable information apparatus |
JP5225453B2 (ja) * | 2005-05-23 | 2013-07-03 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7599210B2 (en) * | 2005-08-19 | 2009-10-06 | Sony Corporation | Nonvolatile memory cell, storage device and nonvolatile logic circuit |
JP2011146121A (ja) * | 2011-03-23 | 2011-07-28 | Fujitsu Semiconductor Ltd | 半導体記憶装置およびその制御方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3621302A (en) * | 1969-01-15 | 1971-11-16 | Ibm | Monolithic-integrated semiconductor array having reduced power consumption |
JPS5589984A (en) * | 1978-12-28 | 1980-07-08 | Fujitsu Ltd | Static memory cell |
JPS5685934A (en) * | 1979-12-14 | 1981-07-13 | Nippon Telegr & Teleph Corp <Ntt> | Control signal generating circuit |
JPS581884A (ja) * | 1981-06-29 | 1983-01-07 | Fujitsu Ltd | スタティックramの電源供給方式 |
JPS58122693A (ja) * | 1982-01-14 | 1983-07-21 | Nippon Telegr & Teleph Corp <Ntt> | メモリ回路 |
JPS5957525A (ja) * | 1982-09-28 | 1984-04-03 | Fujitsu Ltd | Cmis回路装置 |
JPH01166391A (ja) * | 1987-12-23 | 1989-06-30 | Toshiba Corp | スタティック型ランダムアクセスメモリ |
US5159571A (en) * | 1987-12-29 | 1992-10-27 | Hitachi, Ltd. | Semiconductor memory with a circuit for testing characteristics of flip-flops including selectively applied power supply voltages |
DE58903906D1 (de) * | 1988-02-10 | 1993-05-06 | Siemens Ag | Redundanzdekoder eines integrierten halbleiterspeichers. |
JPH07109864B2 (ja) * | 1989-09-13 | 1995-11-22 | シャープ株式会社 | スタティックram |
-
1990
- 1990-04-21 JP JP2105908A patent/JP2723338B2/ja not_active Expired - Fee Related
-
1991
- 1991-04-19 DE DE69124711T patent/DE69124711T2/de not_active Expired - Lifetime
- 1991-04-19 EP EP91106361A patent/EP0453997B1/de not_active Expired - Lifetime
- 1991-04-20 KR KR1019910006381A patent/KR950006425B1/ko not_active IP Right Cessation
-
1994
- 1994-01-24 US US08/185,169 patent/US5355331A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69124711T2 (de) | 1997-07-03 |
JPH046695A (ja) | 1992-01-10 |
EP0453997B1 (de) | 1997-02-19 |
EP0453997A1 (de) | 1991-10-30 |
KR950006425B1 (ko) | 1995-06-15 |
JP2723338B2 (ja) | 1998-03-09 |
US5355331A (en) | 1994-10-11 |
KR910019055A (ko) | 1991-11-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69132121T2 (de) | Halbleiterspeichervorrichtung | |
DE69228905T4 (de) | Halbleiterspeichergerät | |
DE69123666D1 (de) | Halbleiterspeicheranordnung | |
DE69125671D1 (de) | Halbleiter-Speicherbauteil | |
DE69125206T2 (de) | Halbleiterspeicheranordnung | |
DE69121801D1 (de) | Halbleiterspeicheranordnung | |
DE69123379T2 (de) | Halbleiterspeichervorrichtung | |
DE69125535D1 (de) | Halbleiterspeicheranordnung | |
DE69224245D1 (de) | Halbleiter-Speichereinrichtung | |
DE69024680T2 (de) | Halbleiter-Speichereinrichtung | |
DE69125339D1 (de) | Halbleiterspeicheranordnung | |
DE69032303D1 (de) | Halbleiter-Speichereinrichtung | |
DE69124940D1 (de) | Halbleiter-Speichereinrichtung | |
DE69124711D1 (de) | Halbleiter-Speichereinrichtung | |
DE69123294T2 (de) | Halbleiterspeicheranordnung | |
DE69214313T2 (de) | Halbleiter-Speichereinrichtung | |
DE69124286T2 (de) | Halbleiterspeicheranordnung | |
DE69122293D1 (de) | Halbleiterspeicheranordnung | |
DE69124022D1 (de) | Halbleiterspeicheranordnung | |
DE69119252T2 (de) | Halbleiterspeicheranordnung | |
DE69119141T2 (de) | Halbleiterspeicheranordnung | |
DE69122909T2 (de) | Halbleiterspeicheranordnung | |
DE69121804T2 (de) | Halbleiterspeicheranordnung | |
DE69121366T2 (de) | Halbleiterspeicheranordnung | |
DE69122192T2 (de) | Halbleiterspeichereinrichtung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |