DE69126156T2 - Verfahren zur Herstellung von Halbleiterbauelementen mit Floatinggates - Google Patents

Verfahren zur Herstellung von Halbleiterbauelementen mit Floatinggates

Info

Publication number
DE69126156T2
DE69126156T2 DE69126156T DE69126156T DE69126156T2 DE 69126156 T2 DE69126156 T2 DE 69126156T2 DE 69126156 T DE69126156 T DE 69126156T DE 69126156 T DE69126156 T DE 69126156T DE 69126156 T2 DE69126156 T2 DE 69126156T2
Authority
DE
Germany
Prior art keywords
production
semiconductor components
floating gates
gates
floating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69126156T
Other languages
English (en)
Other versions
DE69126156D1 (de
Inventor
Eiji Sakagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69126156D1 publication Critical patent/DE69126156D1/de
Application granted granted Critical
Publication of DE69126156T2 publication Critical patent/DE69126156T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
DE69126156T 1990-03-13 1991-03-13 Verfahren zur Herstellung von Halbleiterbauelementen mit Floatinggates Expired - Fee Related DE69126156T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6153190 1990-03-13

Publications (2)

Publication Number Publication Date
DE69126156D1 DE69126156D1 (de) 1997-06-26
DE69126156T2 true DE69126156T2 (de) 1997-10-09

Family

ID=13173783

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69126156T Expired - Fee Related DE69126156T2 (de) 1990-03-13 1991-03-13 Verfahren zur Herstellung von Halbleiterbauelementen mit Floatinggates

Country Status (4)

Country Link
US (1) US5147811A (de)
EP (1) EP0446893B1 (de)
KR (1) KR940010930B1 (de)
DE (1) DE69126156T2 (de)

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US5258319A (en) * 1988-02-19 1993-11-02 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a MOS type field effect transistor using an oblique ion implantation step
JPH05121763A (ja) * 1991-10-30 1993-05-18 Rohm Co Ltd 半導体記憶装置の製造方法
US5625212A (en) * 1992-03-23 1997-04-29 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device and method of manufacturing the same
US5432107A (en) * 1992-11-04 1995-07-11 Matsushita Electric Industrial Co., Ltd. Semiconductor fabricating method forming channel stopper with diagonally implanted ions
JP3050717B2 (ja) * 1993-03-24 2000-06-12 シャープ株式会社 半導体装置の製造方法
JPH06291181A (ja) * 1993-03-30 1994-10-18 Nippon Steel Corp 半導体装置の製造方法
JP2536413B2 (ja) * 1993-06-28 1996-09-18 日本電気株式会社 半導体集積回路装置の製造方法
US5372957A (en) * 1993-07-22 1994-12-13 Taiwan Semiconductor Manufacturing Company Multiple tilted angle ion implantation MOSFET method
US5308780A (en) * 1993-07-22 1994-05-03 United Microelectronics Corporation Surface counter-doped N-LDD for high hot carrier reliability
US5432106A (en) * 1993-08-02 1995-07-11 United Microelectronics Corporation Manufacture of an asymmetric non-volatile memory cell
US5496747A (en) * 1993-08-02 1996-03-05 United Microelectronics Corporation Split-gate process for non-volatile memory
US5444279A (en) * 1993-08-11 1995-08-22 Micron Semiconductor, Inc. Floating gate memory device having discontinuous gate oxide thickness over the channel region
BE1007475A3 (nl) * 1993-09-06 1995-07-11 Philips Electronics Nv Halfgeleiderinrichting met een niet-vluchtig geheugen en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.
US5344787A (en) * 1993-09-24 1994-09-06 Vlsi Technology, Inc. Latid implants for increasing the effective width of transistor elements in a semiconductor device
EP0655778A3 (de) * 1993-11-25 1996-01-03 Matsushita Electronics Corp Verfahren zur Herstellung von Halbleiterspeicheranordnungen.
JP2848223B2 (ja) * 1993-12-01 1999-01-20 日本電気株式会社 不揮発性半導体記憶装置の消去方法及び製造方法
JP3584338B2 (ja) * 1994-03-03 2004-11-04 ローム・ユーエスエー・インク 電気的に消去及びプログラム可能なデバイスの消去方法
US5409848A (en) * 1994-03-31 1995-04-25 Vlsi Technology, Inc. Angled lateral pocket implants on p-type semiconductor devices
US5482878A (en) * 1994-04-04 1996-01-09 Motorola, Inc. Method for fabricating insulated gate field effect transistor having subthreshold swing
US5441906A (en) * 1994-04-04 1995-08-15 Motorola, Inc. Insulated gate field effect transistor having a partial channel and method for fabricating
US5427964A (en) * 1994-04-04 1995-06-27 Motorola, Inc. Insulated gate field effect transistor and method for fabricating
US5543337A (en) * 1994-06-15 1996-08-06 Lsi Logic Corporation Method for fabricating field effect transistor structure using symmetrical high tilt angle punchthrough implants
EP0696050B1 (de) * 1994-07-18 1998-10-14 STMicroelectronics S.r.l. Nicht-flüchtiger EPROM und Flash-EEPROM-Speicher und Verfahren zu seiner Herstellung
US5413945A (en) * 1994-08-12 1995-05-09 United Micro Electronics Corporation Blanket N-LDD implantation for sub-micron MOS device manufacturing
US5468981A (en) * 1994-09-01 1995-11-21 Advanced Micro Devices, Inc. Self-aligned buried channel/junction stacked gate flash memory cell
US5700728A (en) * 1994-11-07 1997-12-23 United Microelectronics Corporation Method of forming an MNOS/MONOS by employing large tilt angle ion implantation underneath the field oxide
US5801076A (en) * 1995-02-21 1998-09-01 Advanced Micro Devices, Inc. Method of making non-volatile memory device having a floating gate with enhanced charge retention
US5593907A (en) * 1995-03-08 1997-01-14 Advanced Micro Devices Large tilt angle boron implant methodology for reducing subthreshold current in NMOS integrated circuit devices
US5659504A (en) * 1995-05-25 1997-08-19 Lucent Technologies Inc. Method and apparatus for hot carrier injection
KR0172275B1 (ko) * 1995-06-02 1999-02-01 김주용 플래쉬 이이피롬 셀의 접합부 형성방법
KR970004074A (ko) * 1995-06-05 1997-01-29 빈센트 비. 인그라시아 절연 게이트 전계 효과 트랜지스터 및 그 제조 방법
JPH09148542A (ja) * 1995-11-17 1997-06-06 Sharp Corp 半導体記憶装置及びその製造方法
US5719425A (en) * 1996-01-31 1998-02-17 Micron Technology, Inc. Multiple implant lightly doped drain (MILDD) field effect transistor
US5849615A (en) * 1996-02-22 1998-12-15 Micron Technology, Inc. Semiconductor processing method of fabricating field effect transistors
US6346439B1 (en) 1996-07-09 2002-02-12 Micron Technology, Inc. Semiconductor transistor devices and methods for forming semiconductor transistor devices
US5793088A (en) * 1996-06-18 1998-08-11 Integrated Device Technology, Inc. Structure for controlling threshold voltage of MOSFET
US5770880A (en) * 1996-09-03 1998-06-23 Harris Corporation P-collector H.V. PMOS switch VT adjusted source/drain
US6236085B1 (en) 1996-11-11 2001-05-22 Denso Corporation Semiconductor memory device having high-concentration region around electric-field moderating layer in substrate
US5998274A (en) * 1997-04-10 1999-12-07 Micron Technology, Inc. Method of forming a multiple implant lightly doped drain (MILDD) field effect transistor
US6127222A (en) * 1997-12-16 2000-10-03 Advanced Micro Devices, Inc. Non-self-aligned side channel implants for flash memory cells
US6103602A (en) * 1997-12-17 2000-08-15 Advanced Micro Devices, Inc. Method and system for providing a drain side pocket implant
US6087219A (en) * 1998-06-19 2000-07-11 Taiwan Semiconductor Manufacturing Company Highly reliable flash memory structure with halo source
JP3264323B2 (ja) * 1998-07-31 2002-03-11 日本電気株式会社 リバースプロファイリング方法
KR20010088817A (ko) * 1998-09-29 2001-09-28 토토라노 제이. 빈센트 게이트 위에 산화막층의 증착
US6284603B1 (en) * 2000-07-12 2001-09-04 Chartered Semiconductor Manufacturing Inc. Flash memory cell structure with improved channel punch-through characteristics
US6524914B1 (en) * 2000-10-30 2003-02-25 Advanced Micro Devices, Inc. Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory
KR100373855B1 (ko) 2001-01-20 2003-02-26 삼성전자주식회사 낸드형 플래시 메모리 장치 및 그 형성방법
US6673664B2 (en) * 2001-10-16 2004-01-06 Sharp Laboratories Of America, Inc. Method of making a self-aligned ferroelectric memory transistor
US6878589B1 (en) * 2003-05-06 2005-04-12 Advanced Micro Devices, Inc. Method and system for improving short channel effect on a floating gate device
US7393752B2 (en) * 2005-07-25 2008-07-01 Freescale Semiconductor, Inc. Semiconductor devices and method of fabrication
EP2400547B1 (de) * 2009-02-18 2016-11-23 Nanjing University Lichtempfindlicher detektor mit mosfet mit dielektrischem verbundgate und signalleseverfahren dafür
KR101974439B1 (ko) 2012-06-11 2019-05-02 삼성전자 주식회사 반도체 장치 및 그 제조 방법
CN107710417B (zh) 2015-06-16 2021-06-11 三菱电机株式会社 半导体装置的制造方法

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US4232439A (en) * 1976-11-30 1980-11-11 Vlsi Technology Research Association Masking technique usable in manufacturing semiconductor devices
JPS57130475A (en) * 1981-02-06 1982-08-12 Mitsubishi Electric Corp Semiconductor memory storage and its manufacture
JPS5893279A (ja) * 1981-11-30 1983-06-02 Fujitsu Ltd 半導体装置の製造方法
JPS5961185A (ja) * 1982-09-30 1984-04-07 Fujitsu Ltd Ｍｉｓ電界効果半導体装置の製造方法
US4771012A (en) * 1986-06-13 1988-09-13 Matsushita Electric Industrial Co., Ltd. Method of making symmetrically controlled implanted regions using rotational angle of the substrate
JP2706460B2 (ja) * 1988-03-14 1998-01-28 富士通株式会社 イオン注入方法

Also Published As

Publication number Publication date
DE69126156D1 (de) 1997-06-26
EP0446893A1 (de) 1991-09-18
US5147811A (en) 1992-09-15
EP0446893B1 (de) 1997-05-21
KR940010930B1 (ko) 1994-11-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee