DE69126420D1 - Eine Halbleiterspeicheranordnung mit einer internen Spannungsgeneratorschaltung - Google Patents

Eine Halbleiterspeicheranordnung mit einer internen Spannungsgeneratorschaltung

Info

Publication number
DE69126420D1
DE69126420D1 DE69126420T DE69126420T DE69126420D1 DE 69126420 D1 DE69126420 D1 DE 69126420D1 DE 69126420 T DE69126420 T DE 69126420T DE 69126420 T DE69126420 T DE 69126420T DE 69126420 D1 DE69126420 D1 DE 69126420D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
voltage generator
generator circuit
internal voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69126420T
Other languages
English (en)
Other versions
DE69126420T2 (de
Inventor
Masaki Kumanoya
Katsumi Dosaka
Yasuhiro Konishi
Akira Yamazaki
Hisashi Iwamoto
Kouji Hayano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69126420D1 publication Critical patent/DE69126420D1/de
Application granted granted Critical
Publication of DE69126420T2 publication Critical patent/DE69126420T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G11C5/146Substrate bias generators
DE69126420T 1991-02-07 1991-10-17 Eine Halbleiterspeicheranordnung mit einer internen Spannungsgeneratorschaltung Expired - Fee Related DE69126420T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3016694A JPH04255989A (ja) 1991-02-07 1991-02-07 半導体記憶装置および内部電圧発生方法

Publications (2)

Publication Number Publication Date
DE69126420D1 true DE69126420D1 (de) 1997-07-10
DE69126420T2 DE69126420T2 (de) 1997-10-30

Family

ID=11923406

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69126420T Expired - Fee Related DE69126420T2 (de) 1991-02-07 1991-10-17 Eine Halbleiterspeicheranordnung mit einer internen Spannungsgeneratorschaltung

Country Status (5)

Country Link
US (1) US6333873B1 (de)
EP (1) EP0498107B1 (de)
JP (1) JPH04255989A (de)
KR (1) KR950014905B1 (de)
DE (1) DE69126420T2 (de)

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KR100542708B1 (ko) * 2003-05-28 2006-01-11 주식회사 하이닉스반도체 고전압 발생기
KR100586545B1 (ko) * 2004-02-04 2006-06-07 주식회사 하이닉스반도체 반도체 메모리 장치의 오실레이터용 전원공급회로 및 이를이용한 전압펌핑장치
KR100604657B1 (ko) * 2004-05-06 2006-07-25 주식회사 하이닉스반도체 최적화된 내부전압을 공급할 수 있는 전원공급회로를구비하는 반도체 메모리 장치
KR100761358B1 (ko) * 2004-06-03 2007-09-27 주식회사 하이닉스반도체 반도체 기억 소자 및 그의 내부 전압 조절 방법
KR100689817B1 (ko) 2004-11-05 2007-03-08 삼성전자주식회사 전압 발생 회로 및 이 회로를 구비하는 반도체 메모리 장치
KR100702124B1 (ko) * 2005-04-01 2007-03-30 주식회사 하이닉스반도체 내부전압 공급회로
KR100696956B1 (ko) * 2005-04-29 2007-03-20 주식회사 하이닉스반도체 내부전원 생성장치
KR100696958B1 (ko) * 2005-04-29 2007-03-20 주식회사 하이닉스반도체 내부 전압 발생 회로
KR100733419B1 (ko) * 2005-04-30 2007-06-29 주식회사 하이닉스반도체 내부전원 생성장치
KR100733414B1 (ko) * 2005-04-30 2007-06-29 주식회사 하이닉스반도체 내부전원 생성장치
KR100649973B1 (ko) * 2005-09-14 2006-11-27 주식회사 하이닉스반도체 내부 전압 발생 장치
US7417494B2 (en) * 2005-09-29 2008-08-26 Hynix Semiconductor Inc. Internal voltage generator
US8001434B1 (en) 2008-04-14 2011-08-16 Netlist, Inc. Memory board with self-testing capability
KR100902060B1 (ko) 2008-05-08 2009-06-15 주식회사 하이닉스반도체 반도체 메모리 장치의 펌핑 전압 생성 회로 및 방법
JP5667932B2 (ja) * 2011-06-16 2015-02-12 ルネサスエレクトロニクス株式会社 半導体記憶装置
US9917507B2 (en) 2015-05-28 2018-03-13 Sandisk Technologies Llc Dynamic clock period modulation scheme for variable charge pump load currents
US9647536B2 (en) 2015-07-28 2017-05-09 Sandisk Technologies Llc High voltage generation using low voltage devices
US9520776B1 (en) 2015-09-18 2016-12-13 Sandisk Technologies Llc Selective body bias for charge pump transfer switches
US10199090B2 (en) 2016-09-21 2019-02-05 Apple Inc. Low active power write driver with reduced-power boost circuit
JP7166797B2 (ja) * 2018-06-13 2022-11-08 ラピスセミコンダクタ株式会社 電圧生成回路、半導体記憶装置、及び電圧生成方法

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Also Published As

Publication number Publication date
KR920017102A (ko) 1992-09-26
EP0498107A3 (en) 1993-01-13
US6333873B1 (en) 2001-12-25
KR950014905B1 (ko) 1995-12-16
EP0498107B1 (de) 1997-06-04
DE69126420T2 (de) 1997-10-30
JPH04255989A (ja) 1992-09-10
EP0498107A2 (de) 1992-08-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee