DE69128674T2 - Integrierte Schaltung mit verringerter Empfindlichkeit für Spannungsübergänge - Google Patents

Integrierte Schaltung mit verringerter Empfindlichkeit für Spannungsübergänge

Info

Publication number
DE69128674T2
DE69128674T2 DE69128674T DE69128674T DE69128674T2 DE 69128674 T2 DE69128674 T2 DE 69128674T2 DE 69128674 T DE69128674 T DE 69128674T DE 69128674 T DE69128674 T DE 69128674T DE 69128674 T2 DE69128674 T2 DE 69128674T2
Authority
DE
Germany
Prior art keywords
integrated circuit
reduced sensitivity
voltage transitions
transitions
sensitivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69128674T
Other languages
English (en)
Other versions
DE69128674D1 (de
Inventor
David P Steele
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MagnaChip Semiconductor Ltd
NCR International Inc
Original Assignee
NCR International Inc
Hyundai Electronics America Inc
Symbios Logic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR International Inc, Hyundai Electronics America Inc, Symbios Logic Inc filed Critical NCR International Inc
Publication of DE69128674D1 publication Critical patent/DE69128674D1/de
Application granted granted Critical
Publication of DE69128674T2 publication Critical patent/DE69128674T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
DE69128674T 1990-09-14 1991-09-12 Integrierte Schaltung mit verringerter Empfindlichkeit für Spannungsübergänge Expired - Lifetime DE69128674T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/582,461 US5041741A (en) 1990-09-14 1990-09-14 Transient immune input buffer

Publications (2)

Publication Number Publication Date
DE69128674D1 DE69128674D1 (de) 1998-02-19
DE69128674T2 true DE69128674T2 (de) 1998-08-27

Family

ID=24329247

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69128674T Expired - Lifetime DE69128674T2 (de) 1990-09-14 1991-09-12 Integrierte Schaltung mit verringerter Empfindlichkeit für Spannungsübergänge

Country Status (4)

Country Link
US (1) US5041741A (de)
EP (1) EP0475757B1 (de)
JP (1) JPH06343023A (de)
DE (1) DE69128674T2 (de)

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* Cited by examiner, † Cited by third party
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JP2769653B2 (ja) * 1991-11-06 1998-06-25 三菱電機株式会社 反転回路
EP0596637A1 (de) * 1992-11-02 1994-05-11 STMicroelectronics, Inc. Eingangspufferschaltung
JPH0746098A (ja) * 1993-08-03 1995-02-14 Nec Corp 遅延回路
KR100392556B1 (ko) * 1994-01-31 2003-11-12 주식회사 하이닉스반도체 시모스회로용입력버퍼
JP3537500B2 (ja) * 1994-08-16 2004-06-14 バー−ブラウン・コーポレーション インバータ装置
US6452442B1 (en) * 1995-12-04 2002-09-17 Intel Corporation Apparatus for obtaining noise immunity in electrical circuits
US5896054A (en) * 1996-12-05 1999-04-20 Motorola, Inc. Clock driver
FR2767243B1 (fr) * 1997-08-11 1999-10-08 Matra Mhs Dispositif adaptateur symetrique de commutation d'un signal logique
US6433592B1 (en) * 1998-05-12 2002-08-13 Infineon Technologies Ag Method and apparatus for switching a field-effect transistor
DE19825216A1 (de) * 1998-06-05 1999-12-09 Siemens Ag Inverterschaltung
JP3164066B2 (ja) * 1998-07-09 2001-05-08 日本電気株式会社 半導体装置
CN1175570C (zh) * 1999-05-12 2004-11-10 因芬尼昂技术股份公司 用于在集成电路的供电电流中产生电流脉冲的电路装置
EP1091492A1 (de) 1999-10-08 2001-04-11 STMicroelectronics S.r.l. Ausgangspuffer für digitale Signale
TW449842B (en) * 2000-07-13 2001-08-11 United Microelectronics Corp SOI electrostatic discharge protection circuit
JP3711257B2 (ja) * 2001-10-30 2005-11-02 三菱電機株式会社 電力用半導体装置
US6753708B2 (en) * 2002-06-13 2004-06-22 Hewlett-Packard Development Company, L.P. Driver circuit connected to pulse shaping circuitry and method of operating same
US20030231038A1 (en) * 2002-06-13 2003-12-18 Kenneth Koch Pulse shaping circuit and method
US6759880B2 (en) 2002-06-13 2004-07-06 Hewlett-Packard Development Company, L.P. Driver circuit connected to a switched capacitor and method of operating same
US6756824B2 (en) * 2002-11-12 2004-06-29 Sun Microsystems, Inc. Self-biased driver amplifiers for high-speed signaling interfaces
EP1583237B1 (de) * 2004-03-31 2007-12-05 Deutsche Thomson-Brandt Gmbh Schaltungsanordnung für den Betrieb eines Schalttransistors
KR100753032B1 (ko) 2004-07-14 2007-08-30 주식회사 하이닉스반도체 입력단 회로
JP4893241B2 (ja) * 2006-11-02 2012-03-07 ミツミ電機株式会社 リセット装置
US7771115B2 (en) * 2007-08-16 2010-08-10 Micron Technology, Inc. Temperature sensor circuit, device, system, and method
US8729954B2 (en) * 2011-08-31 2014-05-20 Freescale Semiconductor, Inc. MOFSET mismatch characterization circuit
US9111894B2 (en) 2011-08-31 2015-08-18 Freescale Semiconductor, Inc. MOFSET mismatch characterization circuit
US10033359B2 (en) * 2015-10-23 2018-07-24 Qualcomm Incorporated Area efficient flip-flop with improved scan hold-margin
US9966953B2 (en) 2016-06-02 2018-05-08 Qualcomm Incorporated Low clock power data-gated flip-flop
US20170358266A1 (en) * 2016-06-13 2017-12-14 Wuhan China Star Optoelectronics Technology Co., Ltd. Goa circuit and liquid crystal display
US10444778B2 (en) * 2016-08-09 2019-10-15 Nxp Usa, Inc. Voltage regulator
US10979049B2 (en) * 2019-05-03 2021-04-13 Taiwan Semiconductor Manufacturing Company Ltd. Logic buffer circuit and method
DE102020104129A1 (de) * 2019-05-03 2020-11-05 Taiwan Semiconductor Manufacturing Co., Ltd. Logikpufferschaltung und verfahren

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Publication number Priority date Publication date Assignee Title
US2860260A (en) * 1956-09-27 1958-11-11 Sykes Langthorne Transistor integrator
US3751682A (en) * 1971-12-17 1973-08-07 Sperry Rand Corp Pulsed voltage driver for capacitive load
GB1434332A (en) * 1973-02-15 1976-05-05 Motorola Inc Integrated circuit filtering circuit
US3898482A (en) * 1974-03-29 1975-08-05 Fairchild Camera Instr Co Noise suppression circuit
US4209713A (en) * 1975-07-18 1980-06-24 Tokyo Shibaura Electric Co., Ltd. Semiconductor integrated circuit device in which difficulties caused by parasitic transistors are eliminated
JPS5931083B2 (ja) * 1975-09-19 1984-07-31 セイコーエプソン株式会社 半導体集積回路
DE2962107D1 (en) * 1978-12-23 1982-03-18 Fujitsu Ltd Semiconductor integrated circuit device including a reference voltage generator feeding a plurality of loads
JPS5737876A (en) * 1980-08-20 1982-03-02 Hitachi Ltd Semiconductor integrated circuit apparatus
JPS5780828A (en) * 1980-11-07 1982-05-20 Hitachi Ltd Semiconductor integrated circuit device
JPS583183A (ja) * 1981-06-30 1983-01-08 Fujitsu Ltd 半導体装置の出力回路
US4477741A (en) * 1982-03-29 1984-10-16 International Business Machines Corporation Dynamic output impedance for 3-state drivers
JPS62159917A (ja) * 1986-01-08 1987-07-15 Toshiba Corp 集積回路におけるインバ−タ回路
JPS62220026A (ja) * 1986-03-20 1987-09-28 Toshiba Corp 出力バツフア回路
NL8601953A (nl) * 1986-07-30 1988-02-16 Philips Nv Cmost-ingangsbuffer voor ttl-niveau ingangssignalen.
JPH0810759B2 (ja) * 1987-05-26 1996-01-31 富士ゼロックス株式会社 半導体集積回路装置
JPS648657A (en) * 1987-06-30 1989-01-12 Mitsubishi Electric Corp Supplementary semiconductor integrated circuit device
JPH0720058B2 (ja) * 1987-10-09 1995-03-06 日本電気株式会社 集積回路
JPH01228319A (ja) * 1988-03-09 1989-09-12 Fuji Electric Co Ltd 半導体集積回路
JPH024005A (ja) * 1988-06-21 1990-01-09 Mitsubishi Electric Corp ノイズ除去回路
US4908528A (en) * 1988-07-21 1990-03-13 Vlsi Technology, Inc. Input circuit having improved noise immunity

Also Published As

Publication number Publication date
DE69128674D1 (de) 1998-02-19
EP0475757A3 (en) 1993-01-13
JPH06343023A (ja) 1994-12-13
EP0475757B1 (de) 1998-01-14
EP0475757A2 (de) 1992-03-18
US5041741A (en) 1991-08-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DELAWAR

8328 Change in the person/name/address of the agent

Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN

8327 Change in the person/name/address of the patent owner

Owner name: HYNIX SEMICONDUCTOR INC., ICHON, KYONGGI, KR

Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DEL, US

8327 Change in the person/name/address of the patent owner

Owner name: MAGNACHIP SEMICONDUCTOR, LTD., CHEONGJU, KR

Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DEL, US