DE69130858D1 - Überlappende Serienverarbeitung - Google Patents

Überlappende Serienverarbeitung

Info

Publication number
DE69130858D1
DE69130858D1 DE69130858T DE69130858T DE69130858D1 DE 69130858 D1 DE69130858 D1 DE 69130858D1 DE 69130858 T DE69130858 T DE 69130858T DE 69130858 T DE69130858 T DE 69130858T DE 69130858 D1 DE69130858 D1 DE 69130858D1
Authority
DE
Germany
Prior art keywords
series processing
overlapping series
overlapping
processing
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69130858T
Other languages
English (en)
Other versions
DE69130858T2 (de
Inventor
Steven Tyler Comfort
John Stephen Liptay
Charles Franklin Webb
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69130858D1 publication Critical patent/DE69130858D1/de
Application granted granted Critical
Publication of DE69130858T2 publication Critical patent/DE69130858T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
DE69130858T 1991-01-16 1991-11-06 Überlappende Serienverarbeitung Expired - Fee Related DE69130858T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/641,987 US5257354A (en) 1991-01-16 1991-01-16 System for monitoring and undoing execution of instructions beyond a serialization point upon occurrence of in-correct results

Publications (2)

Publication Number Publication Date
DE69130858D1 true DE69130858D1 (de) 1999-03-18
DE69130858T2 DE69130858T2 (de) 1999-10-07

Family

ID=24574686

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69130858T Expired - Fee Related DE69130858T2 (de) 1991-01-16 1991-11-06 Überlappende Serienverarbeitung

Country Status (6)

Country Link
US (1) US5257354A (de)
EP (1) EP0495165B1 (de)
JP (1) JPH0785222B2 (de)
BR (1) BR9200054A (de)
CA (1) CA2056715A1 (de)
DE (1) DE69130858T2 (de)

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US5630157A (en) * 1991-06-13 1997-05-13 International Business Machines Corporation Computer organization for multiple and out-of-order execution of condition code testing and setting instructions
EP0529303A3 (en) * 1991-08-29 1993-09-22 International Business Machines Corporation Checkpoint synchronization with instruction overlap enabled
JPH06168263A (ja) * 1992-11-30 1994-06-14 Fujitsu Ltd ベクトル処理装置
US5488706A (en) * 1992-12-18 1996-01-30 Amdahl Corporation Retry request system in a pipeline data processing system where each requesting unit preserves the order of requests
US6032244A (en) * 1993-01-04 2000-02-29 Cornell Research Foundation, Inc. Multiple issue static speculative instruction scheduling with path tag and precise interrupt handling
CA2123442A1 (en) * 1993-09-20 1995-03-21 David S. Ray Multiple execution unit dispatch with instruction dependency
JP3452655B2 (ja) * 1993-09-27 2003-09-29 株式会社日立製作所 ディジタル信号処理プロセッサおよびそれを用いて命令を実行する方法
TW353732B (en) * 1994-03-31 1999-03-01 Ibm Processing system and method of operation
US5465336A (en) * 1994-06-30 1995-11-07 International Business Machines Corporation Fetch and store buffer that enables out-of-order execution of memory instructions in a data processing system
CN1046167C (zh) * 1994-07-21 1999-11-03 张立平 稳定计算机系统输出状态的抗干扰方法
US5748855A (en) * 1995-10-02 1998-05-05 Iinternational Business Machines Corporation Method and system for performance monitoring of misaligned memory accesses in a processing system
US5752062A (en) * 1995-10-02 1998-05-12 International Business Machines Corporation Method and system for performance monitoring through monitoring an order of processor events during execution in a processing system
US5751945A (en) * 1995-10-02 1998-05-12 International Business Machines Corporation Method and system for performance monitoring stalls to identify pipeline bottlenecks and stalls in a processing system
US5729726A (en) * 1995-10-02 1998-03-17 International Business Machines Corporation Method and system for performance monitoring efficiency of branch unit operation in a processing system
US5949971A (en) * 1995-10-02 1999-09-07 International Business Machines Corporation Method and system for performance monitoring through identification of frequency and length of time of execution of serialization instructions in a processing system
US5797019A (en) * 1995-10-02 1998-08-18 International Business Machines Corporation Method and system for performance monitoring time lengths of disabled interrupts in a processing system
US5691920A (en) * 1995-10-02 1997-11-25 International Business Machines Corporation Method and system for performance monitoring of dispatch unit efficiency in a processing system
US6088792A (en) * 1998-04-30 2000-07-11 International Business Machines Corporation Avoiding processor serialization after an S/390 SPKA instruction
US6088791A (en) * 1998-04-30 2000-07-11 International Business Machines Corporation Computer processor system for implementing the ESA/390 STOSM and STNSM instructions without serialization or artificially extending processor execution time
US6618851B1 (en) * 1999-08-31 2003-09-09 Autodesk, Inc. Method and apparatus for state-reversion
US6934814B2 (en) * 2002-11-05 2005-08-23 Newisys, Inc. Cache coherence directory eviction mechanisms in multiprocessor systems which maintain transaction ordering
US6925536B2 (en) * 2002-11-05 2005-08-02 Newisys, Inc. Cache coherence directory eviction mechanisms for unmodified copies of memory lines in multiprocessor systems
US6920532B2 (en) * 2002-11-05 2005-07-19 Newisys, Inc. Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems
WO2004068361A1 (ja) * 2003-01-27 2004-08-12 Fujitsu Limited 記憶制御装置、データキャッシュ制御装置、中央処理装置、記憶装置制御方法、データキャッシュ制御方法およびキャッシュ制御方法
US20050210204A1 (en) * 2003-01-27 2005-09-22 Fujitsu Limited Memory control device, data cache control device, central processing device, storage device control method, data cache control method, and cache control method
US8751753B1 (en) 2003-04-09 2014-06-10 Guillermo J. Rozas Coherence de-coupling buffer
US20130046961A1 (en) * 2011-08-15 2013-02-21 Alexander Rabinovitch Speculative memory write in a pipelined processor
CN103728897B (zh) * 2012-10-12 2016-12-21 深圳市金正方科技股份有限公司 一种基于软硬件结合的抗干扰方法及系统
US9134377B2 (en) * 2013-03-14 2015-09-15 Teradyne, Inc. Method and apparatus for device testing using multiple processing paths
US10139449B2 (en) 2016-01-26 2018-11-27 Teradyne, Inc. Automatic test system with focused test hardware
US10907426B2 (en) 2018-10-15 2021-02-02 H. Udo Zeidler Apparatus and method for early kick detection and loss of drilling mud in oilwell drilling operations

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3736566A (en) * 1971-08-18 1973-05-29 Ibm Central processing unit with hardware controlled checkpoint and retry facilities
WO1985000453A1 (en) * 1983-07-11 1985-01-31 Prime Computer, Inc. Data processing system
JPH0769818B2 (ja) * 1984-10-31 1995-07-31 株式会社日立製作所 デ−タ処理装置
JPH06103494B2 (ja) * 1986-11-18 1994-12-14 株式会社日立製作所 ベクトル処理装置の制御方式
US4991090A (en) * 1987-05-18 1991-02-05 International Business Machines Corporation Posting out-of-sequence fetches
US4901233A (en) * 1987-07-20 1990-02-13 International Business Machines Corporation Computer system with logic for writing instruction identifying data into array control lists for precise post-branch recoveries
US5136696A (en) * 1988-06-27 1992-08-04 Prime Computer, Inc. High-performance pipelined central processor for predicting the occurrence of executing single-cycle instructions and multicycle instructions
US5119483A (en) * 1988-07-20 1992-06-02 Digital Equipment Corporation Application of state silos for recovery from memory management exceptions
US5142634A (en) * 1989-02-03 1992-08-25 Digital Equipment Corporation Branch prediction

Also Published As

Publication number Publication date
JPH05303492A (ja) 1993-11-16
JPH0785222B2 (ja) 1995-09-13
DE69130858T2 (de) 1999-10-07
CA2056715A1 (en) 1992-07-17
EP0495165A2 (de) 1992-07-22
BR9200054A (pt) 1992-09-08
EP0495165A3 (de) 1992-08-12
EP0495165B1 (de) 1999-02-03
US5257354A (en) 1993-10-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee