DE69131309T2 - Speicherdekodierungssystem für eine tragbare Datenendstation - Google Patents

Speicherdekodierungssystem für eine tragbare Datenendstation

Info

Publication number
DE69131309T2
DE69131309T2 DE69131309T DE69131309T DE69131309T2 DE 69131309 T2 DE69131309 T2 DE 69131309T2 DE 69131309 T DE69131309 T DE 69131309T DE 69131309 T DE69131309 T DE 69131309T DE 69131309 T2 DE69131309 T2 DE 69131309T2
Authority
DE
Germany
Prior art keywords
data terminal
portable data
decoding system
memory decoding
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69131309T
Other languages
English (en)
Other versions
DE69131309D1 (de
Inventor
Sung Won Moon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
Original Assignee
Gold Star Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gold Star Co Ltd filed Critical Gold Star Co Ltd
Application granted granted Critical
Publication of DE69131309D1 publication Critical patent/DE69131309D1/de
Publication of DE69131309T2 publication Critical patent/DE69131309T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
DE69131309T 1990-08-30 1991-08-28 Speicherdekodierungssystem für eine tragbare Datenendstation Expired - Fee Related DE69131309T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR900013169 1990-08-30

Publications (2)

Publication Number Publication Date
DE69131309D1 DE69131309D1 (de) 1999-07-15
DE69131309T2 true DE69131309T2 (de) 2000-03-23

Family

ID=19302729

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69131309T Expired - Fee Related DE69131309T2 (de) 1990-08-30 1991-08-28 Speicherdekodierungssystem für eine tragbare Datenendstation

Country Status (3)

Country Link
US (1) US5426753A (de)
EP (1) EP0473139B1 (de)
DE (1) DE69131309T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07192481A (ja) * 1993-12-27 1995-07-28 Mitsubishi Electric Corp 半導体記憶装置
JPH07253965A (ja) * 1994-03-16 1995-10-03 Fujitsu Ltd 積和演算器
US5701270A (en) * 1994-05-09 1997-12-23 Cirrus Logic, Inc. Single chip controller-memory device with interbank cell replacement capability and a memory architecture and methods suitble for implementing the same
US5473573A (en) * 1994-05-09 1995-12-05 Cirrus Logic, Inc. Single chip controller-memory device and a memory architecture and methods suitable for implementing the same
FR2740578A1 (fr) * 1995-10-30 1997-04-30 Theis Bernard Microprocesseur ultrafiltre
JPH10222429A (ja) * 1997-02-03 1998-08-21 Zexel Corp 半導体記憶素子の選択方法及び半導体記憶素子選択回路
US8250295B2 (en) * 2004-01-05 2012-08-21 Smart Modular Technologies, Inc. Multi-rank memory module that emulates a memory module having a different number of ranks
US7916574B1 (en) 2004-03-05 2011-03-29 Netlist, Inc. Circuit providing load isolation and memory domain translation for memory module
US7289386B2 (en) 2004-03-05 2007-10-30 Netlist, Inc. Memory module decoder
US7532537B2 (en) * 2004-03-05 2009-05-12 Netlist, Inc. Memory module with a circuit providing load isolation and memory domain translation
US8516185B2 (en) 2009-07-16 2013-08-20 Netlist, Inc. System and method utilizing distributed byte-wise buffers on a memory module
US8154901B1 (en) 2008-04-14 2012-04-10 Netlist, Inc. Circuit providing load isolation and noise reduction
US8417870B2 (en) * 2009-07-16 2013-04-09 Netlist, Inc. System and method of increasing addressable memory space on a memory board
US9128632B2 (en) 2009-07-16 2015-09-08 Netlist, Inc. Memory module with distributed data buffers and method of operation
CN110428855B (zh) 2013-07-27 2023-09-22 奈特力斯股份有限公司 具有本地分别同步的内存模块

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4821182A (en) * 1978-07-21 1989-04-11 Tandy Corporation Memory address decoding system
US4290105A (en) * 1979-04-02 1981-09-15 American Newspaper Publishers Association Method and apparatus for testing membership in a set through hash coding with allowable errors
US4302820A (en) * 1979-08-20 1981-11-24 Allen-Bradley Company Dual language programmable controller
JPS5668988A (en) * 1979-11-05 1981-06-09 Toshiba Corp Semiconductor memory
US4475176A (en) * 1981-08-06 1984-10-02 Tokyo Shibaura Denki Kabushiki Kaisha Memory control system
US4443865A (en) * 1981-10-26 1984-04-17 Allen-Bradley Co. Processor module for a programmable controller
JPS5927349A (ja) * 1982-08-03 1984-02-13 Sharp Corp 電子機器
US4908748A (en) * 1987-07-28 1990-03-13 Texas Instruments Incorporated Data processing device with parallel circular addressing hardware
US4961172A (en) * 1988-08-11 1990-10-02 Waferscale Integration, Inc. Decoder for a memory address bus
JPH02287646A (ja) * 1989-04-27 1990-11-27 Toshiba Corp メモリ拡張方式

Also Published As

Publication number Publication date
US5426753A (en) 1995-06-20
EP0473139A2 (de) 1992-03-04
EP0473139B1 (de) 1999-06-09
DE69131309D1 (de) 1999-07-15
EP0473139A3 (en) 1992-05-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee