DE69132523D1 - Erzeugung von Mustern und Herstellungsverfahren für Halbleiteranordnungen mit diesem Muster - Google Patents

Erzeugung von Mustern und Herstellungsverfahren für Halbleiteranordnungen mit diesem Muster

Info

Publication number
DE69132523D1
DE69132523D1 DE69132523T DE69132523T DE69132523D1 DE 69132523 D1 DE69132523 D1 DE 69132523D1 DE 69132523 T DE69132523 T DE 69132523T DE 69132523 T DE69132523 T DE 69132523T DE 69132523 D1 DE69132523 D1 DE 69132523D1
Authority
DE
Germany
Prior art keywords
pattern
patterns
generation
semiconductor devices
manufacturing processes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69132523T
Other languages
English (en)
Inventor
Takayuki Yagi
Toshiyuki Komatsu
Yasue Sato
Shinichi Kawate
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2117644A external-priority patent/JP2709175B2/ja
Priority claimed from JP2118675A external-priority patent/JP2966036B2/ja
Priority claimed from JP15868790A external-priority patent/JPH0449623A/ja
Priority claimed from JP2174443A external-priority patent/JP2849458B2/ja
Priority claimed from JP2308550A external-priority patent/JPH04181712A/ja
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69132523D1 publication Critical patent/DE69132523D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16Coating processes; Apparatus therefor
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16Coating processes; Apparatus therefor
    • G03F7/167Coating processes; Apparatus therefor from the gas phase, by plasma deposition
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2041Exposure; Apparatus therefor in the presence of a fluid, e.g. immersion; using fluid cooling means
    • G03F7/2043Exposure; Apparatus therefor in the presence of a fluid, e.g. immersion; using fluid cooling means with the production of a chemical active agent from a fluid, e.g. an etching agent; with meterial deposition from the fluid phase, e.g. contamination resists
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/907Continuous processing
    • Y10S438/908Utilizing cluster apparatus
DE69132523T 1990-05-09 1991-05-08 Erzeugung von Mustern und Herstellungsverfahren für Halbleiteranordnungen mit diesem Muster Expired - Lifetime DE69132523D1 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2117644A JP2709175B2 (ja) 1990-05-09 1990-05-09 エッチングパターンの形成方法
JP2118675A JP2966036B2 (ja) 1990-05-10 1990-05-10 エッチングパターンの形成方法
JP15868790A JPH0449623A (ja) 1990-06-19 1990-06-19 光処理装置
JP2174443A JP2849458B2 (ja) 1990-07-03 1990-07-03 半導体装置の製造方法および製造装置
JP2308550A JPH04181712A (ja) 1990-11-16 1990-11-16 選択照射光を用いたパターン形成装置

Publications (1)

Publication Number Publication Date
DE69132523D1 true DE69132523D1 (de) 2001-03-08

Family

ID=27526774

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69133169T Expired - Lifetime DE69133169D1 (de) 1990-05-09 1991-05-08 Verfahren zur Erzeugung einer Struktur und Verfahren zum Vorbereiten einer halbleitenden Anordnung mit Hilfe dieses Verfahrens
DE69132523T Expired - Lifetime DE69132523D1 (de) 1990-05-09 1991-05-08 Erzeugung von Mustern und Herstellungsverfahren für Halbleiteranordnungen mit diesem Muster

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69133169T Expired - Lifetime DE69133169D1 (de) 1990-05-09 1991-05-08 Verfahren zur Erzeugung einer Struktur und Verfahren zum Vorbereiten einer halbleitenden Anordnung mit Hilfe dieses Verfahrens

Country Status (4)

Country Link
US (3) US5344522A (de)
EP (3) EP0456479B1 (de)
AT (1) ATE199046T1 (de)
DE (2) DE69133169D1 (de)

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Also Published As

Publication number Publication date
DE69133169D1 (de) 2003-01-16
ATE199046T1 (de) 2001-02-15
EP0706088A1 (de) 1996-04-10
EP0456479B1 (de) 2001-01-31
EP0456479A2 (de) 1991-11-13
EP0714119A2 (de) 1996-05-29
US5413664A (en) 1995-05-09
EP0714119A3 (de) 1996-07-03
EP0714119B1 (de) 2002-12-04
EP0456479A3 (en) 1992-11-19
US5490896A (en) 1996-02-13
US5344522A (en) 1994-09-06

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