DE69215743D1 - Fehlerkorrekturkodierungsverfahren mit mindestens zwei parallellen, systematischen Faltungsenkodern, iterativem Dekodierungsverfahren, Dekodierungsmodul und Dekoder dafür - Google Patents
Fehlerkorrekturkodierungsverfahren mit mindestens zwei parallellen, systematischen Faltungsenkodern, iterativem Dekodierungsverfahren, Dekodierungsmodul und Dekoder dafürInfo
- Publication number
- DE69215743D1 DE69215743D1 DE69215743T DE69215743T DE69215743D1 DE 69215743 D1 DE69215743 D1 DE 69215743D1 DE 69215743 T DE69215743 T DE 69215743T DE 69215743 T DE69215743 T DE 69215743T DE 69215743 D1 DE69215743 D1 DE 69215743D1
- Authority
- DE
- Germany
- Prior art keywords
- parallel
- error correction
- correction coding
- systematic convolutional
- convolutional encoders
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0066—Parallel concatenated codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
- H03M13/2978—Particular arrangement of the component decoders
- H03M13/2987—Particular arrangement of the component decoders using more component decoders than component codes, e.g. pipelined turbo iterations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6362—Error control coding in combination with rate matching by puncturing
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
- H03M13/658—Scaling by multiplication or division
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
- H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0067—Rate matching
- H04L1/0068—Rate matching by puncturing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9105280A FR2675971B1 (fr) | 1991-04-23 | 1991-04-23 | Procede de codage correcteur d'erreurs a au moins deux codages convolutifs systematiques en parallele, procede de decodage iteratif, module de decodage et decodeur correspondants. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69215743D1 true DE69215743D1 (de) | 1997-01-23 |
DE69215743T2 DE69215743T2 (de) | 1997-07-10 |
Family
ID=9412374
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69231938T Expired - Lifetime DE69231938T2 (de) | 1991-04-23 | 1992-04-22 | Iteratives Dekodierungsverfahren, Dekodierungsmodul und Dekoder dafür |
DE69215743T Expired - Lifetime DE69215743T2 (de) | 1991-04-23 | 1992-04-22 | Fehlerkorrekturkodierungsverfahren mit mindestens zwei parallellen, systematischen Faltungsenkodern, iterativem Dekodierungsverfahren, Dekodierungsmodul und Dekoder dafür |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69231938T Expired - Lifetime DE69231938T2 (de) | 1991-04-23 | 1992-04-22 | Iteratives Dekodierungsverfahren, Dekodierungsmodul und Dekoder dafür |
Country Status (5)
Country | Link |
---|---|
US (1) | US5446747A (de) |
EP (2) | EP0511141B1 (de) |
DE (2) | DE69231938T2 (de) |
FR (1) | FR2675971B1 (de) |
HK (1) | HK1007841A1 (de) |
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- 1992-04-22 DE DE69231938T patent/DE69231938T2/de not_active Expired - Lifetime
- 1992-04-22 DE DE69215743T patent/DE69215743T2/de not_active Expired - Lifetime
- 1992-04-22 EP EP92460013A patent/EP0511141B1/de not_active Expired - Lifetime
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HK1007841A1 (en) | 1999-04-23 |
FR2675971B1 (fr) | 1993-08-06 |
DE69215743T2 (de) | 1997-07-10 |
US5446747A (en) | 1995-08-29 |
EP0735696A3 (de) | 1999-01-13 |
EP0735696B1 (de) | 2001-07-11 |
FR2675971A1 (fr) | 1992-10-30 |
EP0735696A2 (de) | 1996-10-02 |
DE69231938D1 (de) | 2001-08-16 |
EP0511141A1 (de) | 1992-10-28 |
EP0511141B1 (de) | 1996-12-11 |
DE69231938T2 (de) | 2002-04-04 |
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