DE69223010D1 - Programmierbare, integrierte Logikanordnung - Google Patents

Programmierbare, integrierte Logikanordnung

Info

Publication number
DE69223010D1
DE69223010D1 DE69223010T DE69223010T DE69223010D1 DE 69223010 D1 DE69223010 D1 DE 69223010D1 DE 69223010 T DE69223010 T DE 69223010T DE 69223010 T DE69223010 T DE 69223010T DE 69223010 D1 DE69223010 D1 DE 69223010D1
Authority
DE
Germany
Prior art keywords
programmable
integrated logic
logic arrangement
arrangement
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69223010T
Other languages
English (en)
Inventor
Bruce B Pederson
Richard G Cliff
Bahram Ahanin
Craig Schilling Lytle
Francis B Heile
Kerry Scott Veenstra
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=25033127&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69223010(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Altera Corp filed Critical Altera Corp
Application granted granted Critical
Publication of DE69223010D1 publication Critical patent/DE69223010D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
DE69223010T 1991-09-03 1992-08-06 Programmierbare, integrierte Logikanordnung Expired - Lifetime DE69223010D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/754,017 US5260610A (en) 1991-09-03 1991-09-03 Programmable logic element interconnections for programmable logic array integrated circuits

Publications (1)

Publication Number Publication Date
DE69223010D1 true DE69223010D1 (de) 1997-12-11

Family

ID=25033127

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69223010T Expired - Lifetime DE69223010D1 (de) 1991-09-03 1992-08-06 Programmierbare, integrierte Logikanordnung

Country Status (4)

Country Link
US (3) US5260610A (de)
EP (3) EP1134896A2 (de)
JP (1) JP3488258B2 (de)
DE (1) DE69223010D1 (de)

Families Citing this family (326)

* Cited by examiner, † Cited by third party
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JP3488258B2 (ja) 2004-01-19
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US5376844A (en) 1994-12-27
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