DE69228887D1 - Nicht-flüchtige Speicherzellenstruktur und ihr Herstellungsverfahren - Google Patents

Nicht-flüchtige Speicherzellenstruktur und ihr Herstellungsverfahren

Info

Publication number
DE69228887D1
DE69228887D1 DE69228887T DE69228887T DE69228887D1 DE 69228887 D1 DE69228887 D1 DE 69228887D1 DE 69228887 T DE69228887 T DE 69228887T DE 69228887 T DE69228887 T DE 69228887T DE 69228887 D1 DE69228887 D1 DE 69228887D1
Authority
DE
Germany
Prior art keywords
memory cell
manufacturing process
volatile memory
cell structure
volatile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69228887T
Other languages
English (en)
Other versions
DE69228887T2 (de
Inventor
Cetin Kaya
Howard Tigelaar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69228887D1 publication Critical patent/DE69228887D1/de
Application granted granted Critical
Publication of DE69228887T2 publication Critical patent/DE69228887T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324Gate electrodes for transistors with a floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885Hot carrier injection from the channel
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/981Utilizing varying dielectric thickness
DE69228887T 1991-01-17 1992-01-16 Nicht-flüchtige Speicherzellenstruktur und ihr Herstellungsverfahren Expired - Fee Related DE69228887T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US64195291A 1991-01-17 1991-01-17

Publications (2)

Publication Number Publication Date
DE69228887D1 true DE69228887D1 (de) 1999-05-20
DE69228887T2 DE69228887T2 (de) 1999-08-26

Family

ID=24574531

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69228887T Expired - Fee Related DE69228887T2 (de) 1991-01-17 1992-01-16 Nicht-flüchtige Speicherzellenstruktur und ihr Herstellungsverfahren

Country Status (5)

Country Link
US (3) US5821581A (de)
EP (1) EP0495492B1 (de)
JP (1) JPH06120514A (de)
KR (1) KR100257661B1 (de)
DE (1) DE69228887T2 (de)

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DE69900372T2 (de) * 1991-12-09 2002-05-29 Fujitsu Ltd Versorgungsspannungsschalter
US5883001A (en) * 1994-11-07 1999-03-16 Macronix International Co., Ltd. Integrated circuit passivation process and structure
JPH09293842A (ja) * 1996-04-26 1997-11-11 Ricoh Co Ltd 半導体記憶装置の製造方法
US5914514A (en) * 1996-09-27 1999-06-22 Xilinx, Inc. Two transistor flash EPROM cell
JP3732649B2 (ja) * 1997-05-07 2006-01-05 株式会社東芝 不揮発性半導体記憶装置
US6104057A (en) * 1997-08-25 2000-08-15 Ricoh Company, Ltd. Electrically alterable non-volatile semiconductor memory device
KR100251226B1 (ko) * 1997-12-06 2000-05-01 윤종용 불휘발성 반도체 메모리를 소거하는 회로 및 방법
US6429495B2 (en) * 1998-06-17 2002-08-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with address programming circuit
US6121088A (en) * 1998-09-17 2000-09-19 Taiwan Semiconductor Manufacturing Company Method of manufacture of undoped polysilicon as the floating-gate of a split-gate flash cell
US6373092B1 (en) 1998-09-29 2002-04-16 Texas Instruments Incorporated Staggered-edge capacitor electrode
US6348710B1 (en) * 1999-05-21 2002-02-19 Sanyo Electric Co., Ltd. Non-volatile semiconductor memory device
US6228695B1 (en) 1999-05-27 2001-05-08 Taiwan Semiconductor Manufacturing Company Method to fabricate split-gate with self-aligned source and self-aligned floating gate to control gate
ATE420463T1 (de) * 1999-10-25 2009-01-15 Imec Inter Uni Micro Electr Elektrisch programmierbares und löschbares gerät und ein verfahren zu seinem betrieb
JP2002299609A (ja) * 2001-03-29 2002-10-11 Nec Corp 半導体装置及びその製造方法
US6545504B2 (en) 2001-06-01 2003-04-08 Macronix International Co., Ltd. Four state programmable interconnect device for bus line and I/O pad
US6531887B2 (en) * 2001-06-01 2003-03-11 Macronix International Co., Ltd. One cell programmable switch using non-volatile cell
US6577161B2 (en) * 2001-06-01 2003-06-10 Macronix International Co., Ltd. One cell programmable switch using non-volatile cell with unidirectional and bidirectional states
US7221591B1 (en) * 2002-05-06 2007-05-22 Samsung Electronics Co., Ltd. Fabricating bi-directional nonvolatile memory cells
US6747896B2 (en) * 2002-05-06 2004-06-08 Multi Level Memory Technology Bi-directional floating gate nonvolatile memory
US6914820B1 (en) 2002-05-06 2005-07-05 Multi Level Memory Technology Erasing storage nodes in a bi-directional nonvolatile memory cell
US7042045B2 (en) 2002-06-04 2006-05-09 Samsung Electronics Co., Ltd. Non-volatile memory cell having a silicon-oxide nitride-oxide-silicon gate structure
JP2004186452A (ja) 2002-12-04 2004-07-02 Renesas Technology Corp 不揮発性半導体記憶装置およびその製造方法
US20050097499A1 (en) * 2003-11-03 2005-05-05 Macronix International Co., Ltd. In-circuit configuration architecture with non-volatile configuration store for embedded configurable logic array
US20050102573A1 (en) * 2003-11-03 2005-05-12 Macronix International Co., Ltd. In-circuit configuration architecture for embedded configurable logic array
US20050095008A1 (en) * 2003-11-04 2005-05-05 International Business Machines Corporation Configurator tool for optical networking devices
KR100513309B1 (ko) * 2003-12-05 2005-09-07 삼성전자주식회사 비연속적인 전하 트랩 사이트를 갖는 비휘발성 메모리소자의 소거 방법들
KR100866405B1 (ko) 2006-11-15 2008-11-03 한양대학교 산학협력단 플래시 메모리 소자 및 그 읽기 동작 제어 방법
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US20190258766A1 (en) * 2016-09-20 2019-08-22 Inside Secure Method and apparatus for obfuscating an integrated circuit with camouflaged gates and logic encryption

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4373248A (en) * 1978-07-12 1983-02-15 Texas Instruments Incorporated Method of making high density semiconductor device such as floating gate electrically programmable ROM or the like
US4317272A (en) * 1979-10-26 1982-03-02 Texas Instruments Incorporated High density, electrically erasable, floating gate memory cell
JPS5929155B2 (ja) * 1979-11-12 1984-07-18 富士通株式会社 半導体記憶装置
US4409723A (en) * 1980-04-07 1983-10-18 Eliyahou Harari Method of forming non-volatile EPROM and EEPROM with increased efficiency
JPS5864068A (ja) * 1981-10-14 1983-04-16 Agency Of Ind Science & Technol 不揮発性半導体メモリの書き込み方法
JPS58209164A (ja) * 1982-05-31 1983-12-06 Toshiba Corp 不揮発性半導体メモリ装置の製造方法
JPS59111370A (ja) * 1982-12-16 1984-06-27 Seiko Instr & Electronics Ltd 不揮発性半導体メモリ
US4639893A (en) * 1984-05-15 1987-01-27 Wafer Scale Integration, Inc. Self-aligned split gate EPROM
US4729115A (en) * 1984-09-27 1988-03-01 International Business Machines Corporation Non-volatile dynamic random access memory cell
US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
US4750024A (en) * 1986-02-18 1988-06-07 Texas Instruments Incorporated Offset floating gate EPROM memory cell
US4783766A (en) * 1986-05-30 1988-11-08 Seeq Technology, Inc. Block electrically erasable EEPROM
JPS6352399A (ja) * 1986-08-22 1988-03-05 Hitachi Ltd イーピーロム
US4794565A (en) * 1986-09-15 1988-12-27 The Regents Of The University Of California Electrically programmable memory device employing source side injection
US4949140A (en) * 1987-02-02 1990-08-14 Intel Corporation EEPROM cell with integral select transistor
JPS6425394A (en) * 1987-07-21 1989-01-27 Mitsubishi Electric Corp Nonvolatile semiconductor memory device
US5016215A (en) * 1987-09-30 1991-05-14 Texas Instruments Incorporated High speed EPROM with reverse polarity voltages applied to source and drain regions during reading and writing
FR2621737B1 (fr) * 1987-10-09 1991-04-05 Thomson Semiconducteurs Memoire en circuit integre
JPH07120720B2 (ja) * 1987-12-17 1995-12-20 三菱電機株式会社 不揮発性半導体記憶装置
US4861730A (en) * 1988-01-25 1989-08-29 Catalyst Semiconductor, Inc. Process for making a high density split gate nonvolatile memory cell
US5262987A (en) * 1988-11-17 1993-11-16 Seiko Instruments Inc. Floating gate semiconductor nonvolatile memory having impurity doped regions for low voltage operation
US5242848A (en) * 1990-01-22 1993-09-07 Silicon Storage Technology, Inc. Self-aligned method of making a split gate single transistor non-volatile electrically alterable semiconductor memory device

Also Published As

Publication number Publication date
KR100257661B1 (ko) 2000-06-01
EP0495492A3 (en) 1994-06-01
JPH06120514A (ja) 1994-04-28
US5557565A (en) 1996-09-17
EP0495492B1 (de) 1999-04-14
KR920015556A (ko) 1992-08-27
US5750427A (en) 1998-05-12
US5821581A (en) 1998-10-13
DE69228887T2 (de) 1999-08-26
EP0495492A2 (de) 1992-07-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee