DE69232257T2 - Durch Verarmung kontrollierte Isolationsstufe - Google Patents

Durch Verarmung kontrollierte Isolationsstufe

Info

Publication number
DE69232257T2
DE69232257T2 DE69232257T DE69232257T DE69232257T2 DE 69232257 T2 DE69232257 T2 DE 69232257T2 DE 69232257 T DE69232257 T DE 69232257T DE 69232257 T DE69232257 T DE 69232257T DE 69232257 T2 DE69232257 T2 DE 69232257T2
Authority
DE
Germany
Prior art keywords
depletion
insulation level
level controlled
controlled
insulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69232257T
Other languages
English (en)
Other versions
DE69232257D1 (de
Inventor
Robert Rountree
Charvaka Duvvury
Tatsuroh Maki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Industries Inc filed Critical Texas Industries Inc
Application granted granted Critical
Publication of DE69232257D1 publication Critical patent/DE69232257D1/de
Publication of DE69232257T2 publication Critical patent/DE69232257T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
DE69232257T 1991-09-30 1992-09-24 Durch Verarmung kontrollierte Isolationsstufe Expired - Fee Related DE69232257T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76773791A 1991-09-30 1991-09-30

Publications (2)

Publication Number Publication Date
DE69232257D1 DE69232257D1 (de) 2002-01-17
DE69232257T2 true DE69232257T2 (de) 2002-08-08

Family

ID=25080405

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69232257T Expired - Fee Related DE69232257T2 (de) 1991-09-30 1992-09-24 Durch Verarmung kontrollierte Isolationsstufe

Country Status (4)

Country Link
US (2) US5925922A (de)
EP (1) EP0535536B1 (de)
JP (1) JPH06196634A (de)
DE (1) DE69232257T2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11330385A (ja) * 1998-05-20 1999-11-30 Mitsumi Electric Co Ltd Cmosデバイス
US6885275B1 (en) 1998-11-12 2005-04-26 Broadcom Corporation Multi-track integrated spiral inductor
US6985035B1 (en) 1998-11-12 2006-01-10 Broadcom Corporation System and method for linearizing a CMOS differential pair
US7276970B2 (en) 1998-11-12 2007-10-02 Broadcom Corporation System and method for linearizing a CMOS differential pair
US6445039B1 (en) 1998-11-12 2002-09-03 Broadcom Corporation System and method for ESD Protection
US6525609B1 (en) 1998-11-12 2003-02-25 Broadcom Corporation Large gain range, high linearity, low noise MOS VGA
US7687858B2 (en) 1999-01-15 2010-03-30 Broadcom Corporation System and method for ESD protection
US8405152B2 (en) 1999-01-15 2013-03-26 Broadcom Corporation System and method for ESD protection
WO2000042659A2 (en) 1999-01-15 2000-07-20 Broadcom Corporation System and method for esd protection
US6222237B1 (en) * 1999-05-21 2001-04-24 United Microelectronics Corp. Structure of electrostatic discharge protection device
US7696823B2 (en) 1999-05-26 2010-04-13 Broadcom Corporation System and method for linearizing a CMOS differential pair
WO2000072446A1 (en) 1999-05-26 2000-11-30 Broadcom Corporation Integrated vco
US6365940B1 (en) * 1999-12-21 2002-04-02 Texas Instruments Incorporated High voltage trigger remote-cathode SCR
EP1146560B1 (de) * 2000-04-12 2006-12-06 Infineon Technologies AG ESD-Latch-up-Schutzschaltung für eine integrierte Schaltung
JP4213329B2 (ja) * 2000-06-15 2009-01-21 三菱電機株式会社 限流装置
US6455896B1 (en) * 2001-04-25 2002-09-24 Macronix International Co., Ltd. Protection circuit for a memory array
US6690082B2 (en) * 2001-09-28 2004-02-10 Agere Systems Inc. High dopant concentration diffused resistor and method of manufacture therefor
DE10209069B4 (de) * 2002-02-28 2008-12-04 IHP GmbH - Innovations for High Performance Microelectronics/ Institut für innovative Mikroelektronik GmbH Spannungsbegrenzungselement für hochintegrierte Schaltungen
US20040105202A1 (en) * 2002-12-03 2004-06-03 Industrial Technology Research Institute Electrostatic discharge protection device and method using depletion switch
AU2003901914A0 (en) * 2003-04-22 2003-05-08 Quantum Precision Instruments Pty Ltd Quantum tunnelling transducer device
US7169661B2 (en) * 2004-04-12 2007-01-30 System General Corp. Process of fabricating high resistance CMOS resistor
US7439592B2 (en) 2004-12-13 2008-10-21 Broadcom Corporation ESD protection for high voltage applications
US7505238B2 (en) 2005-01-07 2009-03-17 Agnes Neves Woo ESD configuration for low parasitic capacitance I/O
US20080061374A1 (en) * 2006-09-07 2008-03-13 System General Corporation Semiconductor resistor and semiconductor process of making the same
US20110032648A1 (en) * 2008-04-09 2011-02-10 Nxp B.V. Esd protection
US8563336B2 (en) * 2008-12-23 2013-10-22 International Business Machines Corporation Method for forming thin film resistor and terminal bond pad simultaneously
US9355971B1 (en) 2015-06-23 2016-05-31 Alpha And Omega Semiconductor Incorporated EOS protection for integrated circuits

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667693A (en) * 1979-11-05 1981-06-06 Sanshin Ind Co Ltd Water jet propeller for ship
JPS5667963A (en) * 1979-11-08 1981-06-08 Mitsubishi Electric Corp Gate protection circuit of mos type field effect transistor
JPS59218764A (ja) * 1983-05-27 1984-12-10 Hitachi Ltd 半導体集積回路装置
JPS59228751A (ja) * 1983-06-09 1984-12-22 Seiko Instr & Electronics Ltd 半導体集積回路
JPS60123052A (ja) * 1983-12-07 1985-07-01 Hitachi Ltd 半導体装置
JPS6144454A (ja) * 1984-08-09 1986-03-04 Fujitsu Ltd 半導体装置
JPS62101067A (ja) * 1985-10-28 1987-05-11 Nec Corp 入力保護装置
US4821096A (en) * 1985-12-23 1989-04-11 Intel Corporation Excess energy protection device
US5012317A (en) * 1986-04-11 1991-04-30 Texas Instruments Incorporated Electrostatic discharge protection circuit
US5019888A (en) * 1987-07-23 1991-05-28 Texas Instruments Incorporated Circuit to improve electrostatic discharge protection
JPH07105446B2 (ja) * 1988-01-11 1995-11-13 株式会社東芝 Mos型半導体装置の入力保護回路
US4939616A (en) * 1988-11-01 1990-07-03 Texas Instruments Incorporated Circuit structure with enhanced electrostatic discharge protection
US5270565A (en) * 1989-05-12 1993-12-14 Western Digital Corporation Electro-static discharge protection circuit with bimodal resistance characteristics
GB8911360D0 (en) * 1989-05-17 1989-07-05 Sarnoff David Res Center Electronic charge protection devices
KR960002094B1 (ko) * 1990-11-30 1996-02-10 가부시키가이샤 도시바 입력보호회로를 갖춘 반도체장치

Also Published As

Publication number Publication date
EP0535536A1 (de) 1993-04-07
US5925922A (en) 1999-07-20
JPH06196634A (ja) 1994-07-15
DE69232257D1 (de) 2002-01-17
EP0535536B1 (de) 2001-12-05
US5977596A (en) 1999-11-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: TEXAS INSTRUMENTS INCORPORATED, DALLAS, TEX., US

8339 Ceased/non-payment of the annual fee