DE69232720D1 - Übertragungsmultiplexer mit einer reihenschaltung von gattern - Google Patents
Übertragungsmultiplexer mit einer reihenschaltung von gatternInfo
- Publication number
- DE69232720D1 DE69232720D1 DE69232720T DE69232720T DE69232720D1 DE 69232720 D1 DE69232720 D1 DE 69232720D1 DE 69232720 T DE69232720 T DE 69232720T DE 69232720 T DE69232720 T DE 69232720T DE 69232720 D1 DE69232720 D1 DE 69232720D1
- Authority
- DE
- Germany
- Prior art keywords
- gates
- series
- transmission multiplexer
- multiplexer
- transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Revoked
Links
- 230000005540 biological transmission Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/04—Distributors combined with modulators or demodulators
- H04J3/047—Distributors with transistors or integrated circuits
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/670,075 US5162666A (en) | 1991-03-15 | 1991-03-15 | Transmission gate series multiplexer |
PCT/US1992/001739 WO1992016888A1 (en) | 1991-03-15 | 1992-03-06 | Transmission gate series multiplexer |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69232720D1 true DE69232720D1 (de) | 2002-09-12 |
DE69232720T2 DE69232720T2 (de) | 2003-04-03 |
Family
ID=24688878
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69232720T Revoked DE69232720T2 (de) | 1991-03-15 | 1992-03-06 | Übertragungsmultiplexer mit einer reihenschaltung von gattern |
Country Status (5)
Country | Link |
---|---|
US (1) | US5162666A (de) |
EP (1) | EP0576595B1 (de) |
JP (1) | JP2717111B2 (de) |
DE (1) | DE69232720T2 (de) |
WO (1) | WO1992016888A1 (de) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5250855A (en) * | 1992-03-20 | 1993-10-05 | Vlsi Technology, Inc. | Fast logic circuits |
DE69328743T2 (de) * | 1992-03-30 | 2000-09-07 | Mitsubishi Electric Corp | Halbleiteranordnung |
US5323064A (en) * | 1993-04-26 | 1994-06-21 | Raytheon Company | Radio frequency signal frequency converter |
US5438295A (en) * | 1993-06-11 | 1995-08-01 | Altera Corporation | Look-up table using multi-level decode |
US5815024A (en) * | 1993-06-11 | 1998-09-29 | Altera Corporation | Look-up table using multi-level decode |
US5376829A (en) * | 1993-09-10 | 1994-12-27 | Sun Microsystems, Inc. | High-speed complementary multiplexer |
USRE38451E1 (en) * | 1993-11-12 | 2004-03-02 | Altera Corporation | Universal logic module with arithmetic capabilities |
US5563532A (en) * | 1994-01-24 | 1996-10-08 | Advanced Micro Devices, Inc. | Double filtering glitch eater for elimination of noise from signals on a SCSI bus |
US5708388A (en) * | 1994-12-15 | 1998-01-13 | International Business Machines Corporation | Single current source current generating circit for periodically activating and deactivating portions of an IC |
US5548231A (en) * | 1995-06-02 | 1996-08-20 | Translogic Technology, Inc. | Serial differential pass gate logic design |
EP0762653A3 (de) * | 1995-08-18 | 1998-03-18 | Chip Express (Israel) Ltd. | Zelle für ein kundenspezifisch anpassbares logisches Feld |
JPH0993118A (ja) * | 1995-09-22 | 1997-04-04 | Kawasaki Steel Corp | パストランジスタ論理回路 |
US6097221A (en) | 1995-12-11 | 2000-08-01 | Kawasaki Steel Corporation | Semiconductor integrated circuit capable of realizing logic functions |
US5646558A (en) * | 1995-09-27 | 1997-07-08 | Intel Corporation | Plurality of distinct multiplexers that operate as a single multiplexer |
US5598114A (en) * | 1995-09-27 | 1997-01-28 | Intel Corporation | High speed reduced area multiplexer |
US5625303A (en) * | 1995-09-27 | 1997-04-29 | Intel Corporation | Multiplexer having a plurality of internal data paths that operate at different speeds |
KR100202635B1 (ko) | 1995-10-13 | 1999-06-15 | 구본준 | 리서프 이디모스 트랜지스터와 이를 이용한 고전압 아날로그의 멀티플렉서회로 |
US5955912A (en) * | 1995-10-25 | 1999-09-21 | Texas Instruments Incorporated | Multiplexer circuits |
US5894227A (en) * | 1996-03-15 | 1999-04-13 | Translogic Technology, Inc. | Level restoration circuit for pass logic devices |
US5796128A (en) * | 1996-07-25 | 1998-08-18 | Translogic Technology, Inc. | Gate array with fully wired multiplexer circuits |
US5789966A (en) * | 1996-09-18 | 1998-08-04 | International Business Machines Corporation | Distributed multiplexer |
US5978379A (en) | 1997-01-23 | 1999-11-02 | Gadzoox Networks, Inc. | Fiber channel learning bridge, learning half bridge, and protocol |
US5780883A (en) * | 1997-02-28 | 1998-07-14 | Translogic Technology, Inc. | Gate array architecture for multiplexer based circuits |
US5872477A (en) * | 1997-06-13 | 1999-02-16 | Vtc Inc. | Multiplexer with CMOS break-before-make circuit |
US6359466B1 (en) * | 1997-09-16 | 2002-03-19 | Vantis Corporation | Circuitry to provide fast carry |
JP3701781B2 (ja) * | 1997-11-28 | 2005-10-05 | 株式会社ルネサステクノロジ | 論理回路とその作成方法 |
DE19821455C1 (de) * | 1998-05-13 | 1999-11-25 | Siemens Ag | Verzögerungsoptimierter Multiplexer |
US7430171B2 (en) | 1998-11-19 | 2008-09-30 | Broadcom Corporation | Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost |
US6480032B1 (en) * | 1999-03-04 | 2002-11-12 | Intel Corporation | Gate array architecture |
JP3986036B2 (ja) | 1999-04-16 | 2007-10-03 | 株式会社日立製作所 | 半導体集積回路装置 |
US6288593B1 (en) | 2000-01-04 | 2001-09-11 | Translogic Technology, Inc. | Digital electronic circuit for use in implementing digital logic functions |
JP2001260358A (ja) * | 2000-03-17 | 2001-09-25 | Nec Corp | インクジェット記録ヘッドの駆動装置及びその方法 |
US6792589B2 (en) | 2001-06-15 | 2004-09-14 | Science & Technology Corporation @ Unm | Digital design using selection operations |
US6993731B2 (en) * | 2001-06-15 | 2006-01-31 | Science & Technology Corporation @ Unm | Optimization of digital designs |
KR100518226B1 (ko) * | 2003-04-23 | 2005-10-04 | 주식회사 하이닉스반도체 | Ddl 장치의 클락 분주기 및 그 클락 분주 방법 |
US7053691B2 (en) * | 2003-05-06 | 2006-05-30 | Hewlett-Packard Development Company, L.P. | Electrical circuit for selecting a desired power source |
JP4473660B2 (ja) * | 2004-07-07 | 2010-06-02 | 株式会社アドバンテスト | 間引きフィルタ及び試験装置 |
US7904761B1 (en) * | 2006-03-24 | 2011-03-08 | Xilinx, Inc. | Method and apparatus for a discrete power series generator |
JP5098358B2 (ja) * | 2007-02-22 | 2012-12-12 | 富士通セミコンダクター株式会社 | プロセッシングエレメント及びそれを備えたリコンフィギャラブル回路 |
US8352531B2 (en) * | 2008-07-22 | 2013-01-08 | International Business Machines Corporation | Efficient forcing of corner cases in a floating point rounder |
US8543635B2 (en) * | 2009-01-27 | 2013-09-24 | Xilinx, Inc. | Digital signal processing block with preadder stage |
US8479133B2 (en) | 2009-01-27 | 2013-07-02 | Xilinx, Inc. | Method of and circuit for implementing a filter in an integrated circuit |
US10700888B2 (en) * | 2018-08-06 | 2020-06-30 | Macom Technology Solutions Holdings, Inc. | CMOS quarter-rate multiplexer for high-speed serial links |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3100294A (en) * | 1961-09-29 | 1963-08-06 | Nasa | Time-division multiplexer |
JPS6022767B2 (ja) * | 1979-10-01 | 1985-06-04 | 株式会社東芝 | 2進乗算器細胞回路 |
US4566064A (en) * | 1982-05-10 | 1986-01-21 | American Microsystems, Inc. | Combinational logic structure using PASS transistors |
US4536855A (en) * | 1982-12-23 | 1985-08-20 | International Telephone And Telegraph Corporation | Impedance restoration for fast carry propagation |
US4593390A (en) * | 1984-08-09 | 1986-06-03 | Honeywell, Inc. | Pipeline multiplexer |
JPS62229440A (ja) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | 配列乗算器 |
JPS62229439A (ja) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | 並列乗算器 |
US4710649A (en) * | 1986-04-11 | 1987-12-01 | Raytheon Company | Transmission-gate structured logic circuits |
JPS63107222A (ja) * | 1986-10-24 | 1988-05-12 | Hitachi Ltd | 信号選択出力回路 |
JPS63241634A (ja) * | 1987-03-30 | 1988-10-06 | Toshiba Corp | 並列型加算回路 |
US4817029A (en) * | 1987-05-11 | 1989-03-28 | United Technologies Corporation | Multiple-precision Booth's recode multiplier |
US4926423A (en) * | 1988-09-30 | 1990-05-15 | The Trustees Of Columbia University In The City Of New York | Time-division-multiplexed data transmission system |
US5015883A (en) * | 1989-10-10 | 1991-05-14 | Micron Technology, Inc. | Compact multifunction logic circuit |
US5040139A (en) * | 1990-04-16 | 1991-08-13 | Tran Dzung J | Transmission gate multiplexer (TGM) logic circuits and multiplier architectures |
US5012126A (en) * | 1990-06-04 | 1991-04-30 | Motorola, Inc. | High speed CMOS multiplexer having reduced propagation delay |
-
1991
- 1991-03-15 US US07/670,075 patent/US5162666A/en not_active Expired - Lifetime
-
1992
- 1992-03-06 WO PCT/US1992/001739 patent/WO1992016888A1/en not_active Application Discontinuation
- 1992-03-06 DE DE69232720T patent/DE69232720T2/de not_active Revoked
- 1992-03-06 EP EP92909731A patent/EP0576595B1/de not_active Revoked
- 1992-03-06 JP JP4509329A patent/JP2717111B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69232720T2 (de) | 2003-04-03 |
EP0576595B1 (de) | 2002-08-07 |
WO1992016888A1 (en) | 1992-10-01 |
US5162666A (en) | 1992-11-10 |
EP0576595A4 (en) | 1997-02-12 |
JPH06508965A (ja) | 1994-10-06 |
EP0576595A1 (de) | 1994-01-05 |
JP2717111B2 (ja) | 1998-02-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8328 | Change in the person/name/address of the agent |
Representative=s name: BOETERS & LIECK, 81541 MUENCHEN |
|
8339 | Ceased/non-payment of the annual fee | ||
8331 | Complete revocation |