DE69303764T2 - SOI-Scheibe für BICMOS mit dünnen und dicken SOI-Siliziumgebieten - Google Patents

SOI-Scheibe für BICMOS mit dünnen und dicken SOI-Siliziumgebieten

Info

Publication number
DE69303764T2
DE69303764T2 DE69303764T DE69303764T DE69303764T2 DE 69303764 T2 DE69303764 T2 DE 69303764T2 DE 69303764 T DE69303764 T DE 69303764T DE 69303764 T DE69303764 T DE 69303764T DE 69303764 T2 DE69303764 T2 DE 69303764T2
Authority
DE
Germany
Prior art keywords
soi
bicmos
thin
disk
thick
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69303764T
Other languages
English (en)
Other versions
DE69303764D1 (de
Inventor
Taqi Nasser Buti
Louis Lu-Chen Hsu
Mark Edwin Jost
Seiki Nmn Ogura Seiki Nm Ogura
Ronald Norman Schulz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69303764D1 publication Critical patent/DE69303764D1/de
Publication of DE69303764T2 publication Critical patent/DE69303764T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/78654—Monocrystalline silicon transistors
    • H01L29/78657—SOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76275—Vertical isolation by bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76281—Lateral isolation by selective oxidation of silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76286—Lateral isolation by refilling of trenches with polycristalline material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/009—Bi-MOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/959—Mechanical polishing of wafer
DE69303764T 1992-05-15 1993-04-22 SOI-Scheibe für BICMOS mit dünnen und dicken SOI-Siliziumgebieten Expired - Fee Related DE69303764T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/884,510 US5258318A (en) 1992-05-15 1992-05-15 Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon

Publications (2)

Publication Number Publication Date
DE69303764D1 DE69303764D1 (de) 1996-08-29
DE69303764T2 true DE69303764T2 (de) 1997-02-06

Family

ID=25384782

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69303764T Expired - Fee Related DE69303764T2 (de) 1992-05-15 1993-04-22 SOI-Scheibe für BICMOS mit dünnen und dicken SOI-Siliziumgebieten

Country Status (4)

Country Link
US (1) US5258318A (de)
EP (1) EP0570043B1 (de)
JP (1) JP2654332B2 (de)
DE (1) DE69303764T2 (de)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5561073A (en) * 1992-03-13 1996-10-01 Jerome; Rick C. Method of fabricating an isolation trench for analog bipolar devices in harsh environments
US5364800A (en) * 1993-06-24 1994-11-15 Texas Instruments Incorporated Varying the thickness of the surface silicon layer in a silicon-on-insulator substrate
US5356822A (en) * 1994-01-21 1994-10-18 Alliedsignal Inc. Method for making all complementary BiCDMOS devices
US5599728A (en) * 1994-04-07 1997-02-04 Regents Of The University Of California Method of fabricating a self-aligned high speed MOSFET device
US5489792A (en) 1994-04-07 1996-02-06 Regents Of The University Of California Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility
KR0142797B1 (ko) * 1994-06-17 1998-08-17 문정환 실리콘-온-인슐레이터구조의 제조방법
US5637513A (en) * 1994-07-08 1997-06-10 Nec Corporation Fabrication method of semiconductor device with SOI structure
DE4433845A1 (de) * 1994-09-22 1996-03-28 Fraunhofer Ges Forschung Verfahren zur Herstellung einer dreidimensionalen integrierten Schaltung
US5481126A (en) * 1994-09-27 1996-01-02 Purdue Research Foundation Semiconductor-on-insulator electronic devices having trench isolated monocrystalline active regions
US5494837A (en) * 1994-09-27 1996-02-27 Purdue Research Foundation Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls
DE4440362A1 (de) * 1994-11-11 1996-05-15 Telefunken Microelectron Verfahren zum Herstellen integrierter Schaltungen mit passiven Bauelementen hoher Güte
US5872733A (en) * 1995-06-06 1999-02-16 International Business Machines Corporation Ramp-up rate control circuit for flash memory charge pump
US5567631A (en) * 1995-11-13 1996-10-22 Taiwan Semiconductor Manufacturing Company Method of forming gate spacer to control the base width of a lateral bipolar junction transistor using SOI technology
US5614431A (en) * 1995-12-20 1997-03-25 International Business Machines Corporation Method of making buried strap trench cell yielding an extended transistor
US5728613A (en) * 1996-03-27 1998-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Method of using an insulator spacer to form a narrow base width lateral bipolar junction transistor
JPH10223551A (ja) * 1997-02-12 1998-08-21 Nec Corp Ｓｏｉ基板の製造方法
US5952695A (en) * 1997-03-05 1999-09-14 International Business Machines Corporation Silicon-on-insulator and CMOS-on-SOI double film structures
US5889293A (en) * 1997-04-04 1999-03-30 International Business Machines Corporation Electrical contact to buried SOI structures
US6133608A (en) * 1997-04-23 2000-10-17 International Business Machines Corporation SOI-body selective link method and apparatus
US6160292A (en) * 1997-04-23 2000-12-12 International Business Machines Corporation Circuit and methods to improve the operation of SOI devices
US6410369B1 (en) 1998-04-22 2002-06-25 International Business Machines Corporation Soi-body selective link method and apparatus
US6097056A (en) * 1998-04-28 2000-08-01 International Business Machines Corporation Field effect transistor having a floating gate
EP1084511A1 (de) * 1998-05-08 2001-03-21 Infineon Technologies AG Substrat und dessen herstellungsverfahren
US6015745A (en) * 1998-05-18 2000-01-18 International Business Machines Corporation Method for semiconductor fabrication
JP2000106333A (ja) * 1998-09-29 2000-04-11 Sony Corp Ｓｏｉ構造を有する半導体基板の製造方法及び半導体装置の製造方法
KR100281907B1 (ko) * 1998-10-29 2001-02-15 김덕중 인텔리전트 전력 집적 회로 및 이를 제조하는 방법
US6353246B1 (en) 1998-11-23 2002-03-05 International Business Machines Corporation Semiconductor device including dislocation in merged SOI/DRAM chips
KR20000040104A (ko) 1998-12-17 2000-07-05 김영환 실리콘 온 인슐레이터 웨이퍼의 제조방법
US6214653B1 (en) 1999-06-04 2001-04-10 International Business Machines Corporation Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate
EP1067600B1 (de) * 1999-07-06 2006-11-02 ELMOS Semiconductor AG CMOS kompatibler SOI-Prozess
US6372600B1 (en) * 1999-08-30 2002-04-16 Agere Systems Guardian Corp. Etch stops and alignment marks for bonded wafers
JP4202563B2 (ja) 1999-11-18 2008-12-24 株式会社東芝 半導体装置
TW478095B (en) * 1999-12-09 2002-03-01 United Microelectronics Corp Manufacture method of isolation trench for bipolar complementary transistor
US6486043B1 (en) 2000-08-31 2002-11-26 International Business Machines Corporation Method of forming dislocation filter in merged SOI and non-SOI chips
US6555891B1 (en) 2000-10-17 2003-04-29 International Business Machines Corporation SOI hybrid structure with selective epitaxial growth of silicon
JP2004103946A (ja) * 2002-09-11 2004-04-02 Canon Inc 基板及びその製造方法
DE102004005506B4 (de) * 2004-01-30 2009-11-19 Atmel Automotive Gmbh Verfahren zur Erzeugung von aktiven Halbleiterschichten verschiedener Dicke in einem SOI-Wafer
US20060261436A1 (en) * 2005-05-19 2006-11-23 Freescale Semiconductor, Inc. Electronic device including a trench field isolation region and a process for forming the same
US7670895B2 (en) 2006-04-24 2010-03-02 Freescale Semiconductor, Inc Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer
US7491622B2 (en) 2006-04-24 2009-02-17 Freescale Semiconductor, Inc. Process of forming an electronic device including a layer formed using an inductively coupled plasma
US7528078B2 (en) 2006-05-12 2009-05-05 Freescale Semiconductor, Inc. Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer
JP5066936B2 (ja) * 2007-02-22 2012-11-07 信越半導体株式会社 Ｓｏｉウエーハの製造方法
US10239093B2 (en) 2014-03-12 2019-03-26 Koninklijke Philips N.V. Ultrasound transducer assembly and method for manufacturing an ultrasound transducer assembly
US11393806B2 (en) 2019-09-23 2022-07-19 Analog Devices, Inc. Gallium nitride and silicon carbide hybrid power device
US11195715B2 (en) * 2020-03-17 2021-12-07 Globalfoundries U.S. Inc. Epitaxial growth constrained by a template
CN113664694A (zh) * 2021-07-29 2021-11-19 山西烁科晶体有限公司 碳化硅双面抛光中硅面及碳面去除厚度的测定方法
CN116626922B (zh) * 2023-07-24 2023-10-27 福建玻尔光电科技有限责任公司 内置电极式薄膜铌酸锂电光调制器的制备方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1186340A (en) * 1968-07-11 1970-04-02 Standard Telephones Cables Ltd Manufacture of Semiconductor Devices
US3929528A (en) * 1973-01-12 1975-12-30 Motorola Inc Fabrication of monocriptalline silicon on insulating substrates utilizing selective etching and deposition techniques
NL7710164A (nl) * 1977-09-16 1979-03-20 Philips Nv Werkwijze ter behandeling van een eenkristal- lijn lichaam.
US4549926A (en) * 1982-01-12 1985-10-29 Rca Corporation Method for growing monocrystalline silicon on a mask layer
US4507158A (en) * 1983-08-12 1985-03-26 Hewlett-Packard Co. Trench isolated transistors in semiconductor films
US4554059A (en) * 1983-11-04 1985-11-19 Harris Corporation Electrochemical dielectric isolation technique
JPS60144949A (ja) * 1984-01-06 1985-07-31 Nec Corp 半導体装置の製造方法
JPS61222249A (ja) * 1985-03-28 1986-10-02 Fujitsu Ltd 半導体集積回路装置の製造方法
US4615762A (en) * 1985-04-30 1986-10-07 Rca Corporation Method for thinning silicon
JPS6321631A (ja) * 1986-07-15 1988-01-29 Olympus Optical Co Ltd 絞り駆動装置
JPS6350791A (ja) * 1986-08-20 1988-03-03 株式会社東芝 高速増殖炉の安全容器
NL8700033A (nl) * 1987-01-09 1988-08-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting van het type halfgeleider op isolator.
US4735679A (en) * 1987-03-30 1988-04-05 International Business Machines Corporation Method of improving silicon-on-insulator uniformity
US4760036A (en) * 1987-06-15 1988-07-26 Delco Electronics Corporation Process for growing silicon-on-insulator wafers using lateral epitaxial growth with seed window oxidation
US4902641A (en) * 1987-07-31 1990-02-20 Motorola, Inc. Process for making an inverted silicon-on-insulator semiconductor device having a pedestal structure
US4897362A (en) * 1987-09-02 1990-01-30 Harris Corporation Double epitaxial method of fabricating semiconductor devices on bonded wafers
JPH01106466A (ja) * 1987-10-19 1989-04-24 Fujitsu Ltd 半導体装置の製造方法
JPH067594B2 (ja) * 1987-11-20 1994-01-26 富士通株式会社 半導体基板の製造方法
NL8801981A (nl) * 1988-08-09 1990-03-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
EP0368584B1 (de) * 1988-11-09 1997-03-19 Sony Corporation Herstellungsverfahren eines Halbleiterwafers
US4908328A (en) * 1989-06-06 1990-03-13 National Semiconductor Corporation High voltage power IC process
JPH0324719A (ja) * 1989-06-22 1991-02-01 Canon Inc 単結晶膜の形成方法及び結晶物品
US4923826A (en) * 1989-08-02 1990-05-08 Harris Corporation Method for forming dielectrically isolated transistor
JPH0636414B2 (ja) * 1989-08-17 1994-05-11 信越半導体株式会社 半導体素子形成用基板の製造方法
US5081061A (en) * 1990-02-23 1992-01-14 Harris Corporation Manufacturing ultra-thin dielectrically isolated wafers
US5034343A (en) * 1990-03-08 1991-07-23 Harris Corporation Manufacturing ultra-thin wafer using a handle wafer
US5143862A (en) * 1990-11-29 1992-09-01 Texas Instruments Incorporated SOI wafer fabrication by selective epitaxial growth

Also Published As

Publication number Publication date
EP0570043A3 (de) 1993-11-24
US5258318A (en) 1993-11-02
EP0570043A2 (de) 1993-11-18
JP2654332B2 (ja) 1997-09-17
DE69303764D1 (de) 1996-08-29
EP0570043B1 (de) 1996-07-24
JPH07254653A (ja) 1995-10-03

Similar Documents

Publication Publication Date Title
DE69303764T2 (de) SOI-Scheibe für BICMOS mit dünnen und dicken SOI-Siliziumgebieten
GB2220792B (en) Silicon thin film transistor and method for producing the same
DE3856278D1 (de) Monokristallines Dünnschichtsubstrat
DE68913444D1 (de) Dünnfilm-SOI-MOSFET und Verfahren zur Herstellung.
DE69312504D1 (de) Differentielles gps für landehilfe
IT8553226V0 (it) Dispositivo per la fabbricazione di corpi assorbenti particolarmente per la fabbricazione di assobenti igienici e simili
DE69430494T2 (de) Magnetplattensubstrat und Magnetplatte unter Verwendung desselben
IT8421972A0 (it) Ruotino orientabile con mezzi d'arresto e di ripresa dell'orientabilita'.
DE69127837T2 (de) Hochgeschwindigkeits-SOI-Bauelement und Herstellungsverfahren dafür
DE3888693T2 (de) Flüssigkristall-lichtventil und zugehörige verbindungsschicht.
IT1180610B (it) Cerchione per autoveicoli e simili
DE69119296T2 (de) Dopplergeschwindigkeitsmesser und Gerät unter Verwendung desselben
KR910001888A (ko) 이산화규소 막 증착 방법 및 그 제품
IT1182770B (it) Complesso di cavo flessibile in particolare per tachimetri e simili
DE69309584T2 (de) Alkoxysilane mit Azasilacycloalkylgruppe und Tetrametyldisiloxane mit Azasilacycloalkylgruppe
GB2140203B (en) Thin film transistor with wiring layer continuous with the source and drain
KR870013287U (ko) 2대의 컨베이어가 부착된 분쇄기의 구동장치
DD242503B1 (de) Einrichtung zur nachbildung des schwingungsverhaltens des sitzenden menschen
FR2549578B1 (fr) Dispositif stroboscopique pour la decoration et/ou la publicite
ITRM920442A1 (it) Mensola laterale per il sostegno estremale di mantovane e simili.
IT8621122A1 (it) Visualizzatore elettromeccanico per tabelloni e simili
IT8620646A1 (it) Rivestimento protettivo per veicoli e simili
IT1219112B (it) Dispositivo per la smussatura di spigoli di pannelli e simili
DE9117047U1 (de) Assay für freies und komplexiertes Prostata-spezifisches Antigen
ITMI921104V0 (it) Imballo per bicchieri e simili

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee