DE69315170D1 - Multiport Speicher - Google Patents
Multiport SpeicherInfo
- Publication number
- DE69315170D1 DE69315170D1 DE69315170T DE69315170T DE69315170D1 DE 69315170 D1 DE69315170 D1 DE 69315170D1 DE 69315170 T DE69315170 T DE 69315170T DE 69315170 T DE69315170 T DE 69315170T DE 69315170 D1 DE69315170 D1 DE 69315170D1
- Authority
- DE
- Germany
- Prior art keywords
- multiport memory
- multiport
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4252620A JP2664843B2 (ja) | 1992-09-22 | 1992-09-22 | マルチポートメモリ |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69315170D1 true DE69315170D1 (de) | 1997-12-18 |
DE69315170T2 DE69315170T2 (de) | 1998-04-02 |
Family
ID=17239897
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69315170T Expired - Fee Related DE69315170T2 (de) | 1992-09-22 | 1993-09-21 | Multiport Speicher |
Country Status (5)
Country | Link |
---|---|
US (1) | US5377157A (de) |
EP (1) | EP0591752B1 (de) |
JP (1) | JP2664843B2 (de) |
KR (1) | KR970000871B1 (de) |
DE (1) | DE69315170T2 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR960006274B1 (ko) * | 1993-11-17 | 1996-05-13 | 삼성전자주식회사 | 듀얼포트 메모리 장치 |
US5629901A (en) * | 1995-12-05 | 1997-05-13 | International Business Machines Corporation | Multi write port register |
US5708613A (en) * | 1996-07-22 | 1998-01-13 | International Business Machines Corporation | High performance redundancy in an integrated memory system |
US7092310B2 (en) | 2003-12-19 | 2006-08-15 | International Business Machines Corporation | Memory array with multiple read ports |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5358736A (en) * | 1976-11-08 | 1978-05-26 | Toshiba Corp | Input/output control system for mos dynamic random access memory |
JPH0816882B2 (ja) * | 1985-06-17 | 1996-02-21 | 株式会社日立製作所 | 半導体記憶装置 |
US4710902A (en) * | 1985-10-04 | 1987-12-01 | Motorola, Inc. | Technique restore for a dynamic random access memory |
JPH07111822B2 (ja) * | 1986-03-07 | 1995-11-29 | 株式会社日立製作所 | 半導体記憶装置 |
JP3061060B2 (ja) * | 1989-09-05 | 2000-07-10 | 株式会社東芝 | マルチポートメモリ |
JP2664810B2 (ja) * | 1991-03-07 | 1997-10-22 | 株式会社東芝 | メモリセルアレイ分割型半導体記憶装置 |
JP2928654B2 (ja) * | 1991-04-10 | 1999-08-03 | 株式会社東芝 | マルチポートdram |
-
1992
- 1992-09-22 JP JP4252620A patent/JP2664843B2/ja not_active Expired - Fee Related
-
1993
- 1993-09-16 US US08/121,513 patent/US5377157A/en not_active Expired - Lifetime
- 1993-09-17 KR KR1019930018776A patent/KR970000871B1/ko not_active IP Right Cessation
- 1993-09-21 EP EP93115176A patent/EP0591752B1/de not_active Expired - Lifetime
- 1993-09-21 DE DE69315170T patent/DE69315170T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2664843B2 (ja) | 1997-10-22 |
EP0591752A2 (de) | 1994-04-13 |
DE69315170T2 (de) | 1998-04-02 |
KR940007886A (ko) | 1994-04-28 |
US5377157A (en) | 1994-12-27 |
EP0591752B1 (de) | 1997-11-12 |
EP0591752A3 (en) | 1994-09-14 |
KR970000871B1 (ko) | 1997-01-20 |
JPH06103756A (ja) | 1994-04-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |