DE69318720D1 - Hochgeschwindigkeits-speicherleseverstaerker mit reduzierung des rauschens - Google Patents

Hochgeschwindigkeits-speicherleseverstaerker mit reduzierung des rauschens

Info

Publication number
DE69318720D1
DE69318720D1 DE69318720T DE69318720T DE69318720D1 DE 69318720 D1 DE69318720 D1 DE 69318720D1 DE 69318720 T DE69318720 T DE 69318720T DE 69318720 T DE69318720 T DE 69318720T DE 69318720 D1 DE69318720 D1 DE 69318720D1
Authority
DE
Germany
Prior art keywords
high speed
noise reduction
speed memory
memory reading
reading amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69318720T
Other languages
English (en)
Other versions
DE69318720T2 (de
Inventor
Saroj Pathak
Glen Rosendale
James Payne
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Atmel Corp
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of DE69318720D1 publication Critical patent/DE69318720D1/de
Application granted granted Critical
Publication of DE69318720T2 publication Critical patent/DE69318720T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069I/O lines read out arrangements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/067Single-ended amplifiers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/106Data output latches
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1063Control signal output circuits, e.g. status or busy flags, feedback command signals
DE69318720T 1992-09-21 1993-09-13 Hochgeschwindigkeits-speicherleseverstaerker mit reduzierung des rauschens Expired - Lifetime DE69318720T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/948,481 US5272674A (en) 1992-09-21 1992-09-21 High speed memory sense amplifier with noise reduction
PCT/US1993/008604 WO1994007243A1 (en) 1992-09-21 1993-09-13 High speed memory sense amplifier with noise reduction

Publications (2)

Publication Number Publication Date
DE69318720D1 true DE69318720D1 (de) 1998-06-25
DE69318720T2 DE69318720T2 (de) 1998-11-19

Family

ID=25487898

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69318720T Expired - Lifetime DE69318720T2 (de) 1992-09-21 1993-09-13 Hochgeschwindigkeits-speicherleseverstaerker mit reduzierung des rauschens

Country Status (6)

Country Link
US (1) US5272674A (de)
EP (1) EP0660963B1 (de)
JP (1) JPH08501895A (de)
KR (1) KR100317403B1 (de)
DE (1) DE69318720T2 (de)
WO (1) WO1994007243A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2277390B (en) * 1993-04-21 1997-02-26 Plessey Semiconductors Ltd Random access memory
US5563835A (en) * 1994-01-31 1996-10-08 Advanced Risc Machines Limited Sense amplification in data memories
EP0678870B1 (de) * 1994-02-18 1999-07-28 STMicroelectronics S.r.l. Verfahren und Schaltung zum Unterdrücken von Datenladerauschen in nichtflüchtigen Speichern
US5495191A (en) * 1994-03-25 1996-02-27 Sun Microsystems, Inc. Single ended dynamic sense amplifier
US5546068A (en) * 1994-12-22 1996-08-13 At&T Corp. Sense amplifier
US5559455A (en) * 1994-12-23 1996-09-24 Lucent Technologies Inc. Sense amplifier with overvoltage protection
JPH1055690A (ja) * 1996-08-07 1998-02-24 Nec Corp 電気的書込可能な不揮発性半導体記憶装置
US5777504A (en) * 1996-10-23 1998-07-07 International Business Machines Corporation Couple noise protection circuit technique
KR100299524B1 (ko) * 1999-06-28 2001-11-01 박종섭 메모리소자의 래치회로
FR2813462B1 (fr) * 2000-08-23 2003-01-17 St Microelectronics Sa Circuit tampon pour la reception d'un signal d'horloge
US6438051B1 (en) * 2001-05-31 2002-08-20 International Business Machines Corporation Stabilized direct sensing memory architecture
US6809550B2 (en) 2002-09-20 2004-10-26 Atmel Corporation High speed zero DC power programmable logic device (PLD) architecture
US7583107B2 (en) * 2006-09-27 2009-09-01 Atmel Corporation Sense amplifier circuit for low voltage applications
KR100801055B1 (ko) * 2006-10-16 2008-02-04 삼성전자주식회사 데이터 수신기 및 이를 구비하는 반도체 장치

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856198B2 (ja) * 1980-09-25 1983-12-13 株式会社東芝 半導体記憶装置
JPS5952492A (ja) * 1982-09-17 1984-03-27 Fujitsu Ltd スタテイツク型半導体記憶装置
JPS6381551A (ja) * 1986-09-25 1988-04-12 Sony Corp メモリ装置
US4959816A (en) * 1987-12-28 1990-09-25 Kabushiki Kaisha Toshiba Semiconductor integrated circuit
US5200926A (en) * 1987-12-28 1993-04-06 Kabushiki Kaisha Toshiba Semiconductor integrated circuit
JP2530055B2 (ja) * 1990-08-30 1996-09-04 株式会社東芝 半導体集積回路
KR930008311B1 (ko) * 1990-12-28 1993-08-27 삼성전자 주식회사 센스 앰프의 출력 제어회로

Also Published As

Publication number Publication date
WO1994007243A1 (en) 1994-03-31
EP0660963A4 (de) 1995-12-06
KR950703784A (ko) 1995-09-20
DE69318720T2 (de) 1998-11-19
EP0660963A1 (de) 1995-07-05
US5272674A (en) 1993-12-21
KR100317403B1 (ko) 2002-04-24
EP0660963B1 (de) 1998-05-20
JPH08501895A (ja) 1996-02-27

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Legal Events

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