DE69323689D1 - Schaltung mit Reed-Solomon Fehlerkorrektur und CRC Fehlererkennung - Google Patents

Schaltung mit Reed-Solomon Fehlerkorrektur und CRC Fehlererkennung

Info

Publication number
DE69323689D1
DE69323689D1 DE69323689T DE69323689T DE69323689D1 DE 69323689 D1 DE69323689 D1 DE 69323689D1 DE 69323689 T DE69323689 T DE 69323689T DE 69323689 T DE69323689 T DE 69323689T DE 69323689 D1 DE69323689 D1 DE 69323689D1
Authority
DE
Germany
Prior art keywords
reed
circuit
solomon
error correction
error detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69323689T
Other languages
English (en)
Other versions
DE69323689T2 (de
Inventor
Yukio Kodama
Kazuo Murakami
Hideo Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE69323689D1 publication Critical patent/DE69323689D1/de
Publication of DE69323689T2 publication Critical patent/DE69323689T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H03M13/091Parallel or block-wise CRC computation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515Reed-Solomon codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/15Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/159Remainder calculation, e.g. for encoding and syndrome calculation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6575Implementations based on combinatorial logic, e.g. Boolean circuits
DE69323689T 1992-11-04 1993-10-21 Schaltung mit Reed-Solomon Fehlerkorrektur und CRC Fehlererkennung Expired - Fee Related DE69323689T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4294853A JP2821324B2 (ja) 1992-11-04 1992-11-04 誤り訂正回路

Publications (2)

Publication Number Publication Date
DE69323689D1 true DE69323689D1 (de) 1999-04-08
DE69323689T2 DE69323689T2 (de) 1999-07-22

Family

ID=17813102

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69323689T Expired - Fee Related DE69323689T2 (de) 1992-11-04 1993-10-21 Schaltung mit Reed-Solomon Fehlerkorrektur und CRC Fehlererkennung
DE69328318T Expired - Fee Related DE69328318T2 (de) 1992-11-04 1993-10-21 Fehlerkorrekturschaltung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69328318T Expired - Fee Related DE69328318T2 (de) 1992-11-04 1993-10-21 Fehlerkorrekturschaltung

Country Status (4)

Country Link
US (1) US5361266A (de)
EP (2) EP0596340B1 (de)
JP (1) JP2821324B2 (de)
DE (2) DE69323689T2 (de)

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US5689727A (en) * 1994-09-08 1997-11-18 Western Digital Corporation Disk drive with pipelined embedded ECC/EDC controller which provides parallel operand fetching and instruction execution
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US5719885A (en) * 1995-12-28 1998-02-17 Emc Corporation Storage reliability method and apparatus
US5942002A (en) * 1996-03-08 1999-08-24 Neo-Lore Method and apparatus for generating a transform
JP3154679B2 (ja) * 1996-10-18 2001-04-09 三菱電機株式会社 連接符号の誤り訂正復号装置及び復号方法
PL192288B1 (pl) * 1996-12-12 2006-09-29 Siemens Schweiz Ag Sposób dekodowania sygnału kodowanego cyklicznie
US6006354A (en) * 1997-02-12 1999-12-21 Stmicroelectronics, Inc. Security device for a video digital to analog converter
JP3239795B2 (ja) * 1997-04-23 2001-12-17 三菱電機株式会社 誤り訂正復号装置および誤り訂正復号方式
US5996105A (en) * 1997-11-14 1999-11-30 Cirrus Logic, Inc. ECC system employing a data buffer for storing codeword data and a syndrome buffer for storing error syndromes
US6253346B1 (en) * 1997-11-29 2001-06-26 Korea Telecommunication Authority Data transmission circuit having cyclic redundancy check circuit and data rate control circuit
US6574776B1 (en) * 1999-04-09 2003-06-03 Oak Technology, Inc. Simultaneous processing for error detection and P-parity ECC encoding
US6092231A (en) * 1998-06-12 2000-07-18 Qlogic Corporation Circuit and method for rapid checking of error correction codes using cyclic redundancy check
US6128760A (en) * 1998-10-13 2000-10-03 Lsi Logic Corporation Method and apparatus for calculating a CRC remainder
WO2000067418A1 (de) 1999-04-30 2000-11-09 Rohde & Schwarz Gmbh & Co. Kg Verfahren zum messen der empfangsseitigen bitfehlerrate eines dvb-übertra-gungssystems
DE19919900A1 (de) * 1999-04-30 2000-11-02 Rohde & Schwarz Verfahren zum Messen der empfangsseitigen Bitfhlerrate eines DVB-Übertragungssystems
US6681364B1 (en) * 1999-09-24 2004-01-20 International Business Machines Corporation Cyclic redundancy check for partitioned frames
US6460157B1 (en) * 1999-11-30 2002-10-01 International Business Machines Corporation Method system and program products for error correction code conversion
US6519737B1 (en) 2000-03-07 2003-02-11 International Business Machines Corporation Computing the CRC bits at a time for data whose length in bits is not a multiple of M
US7111228B1 (en) 2002-05-07 2006-09-19 Marvell International Ltd. System and method for performing parity checks in disk storage system
EP1536585A1 (de) * 2002-07-30 2005-06-01 Fujitsu Limited Datenverarbeiter sowie verfahren zur datenverarbeitung
KR100496639B1 (ko) * 2002-11-27 2005-06-20 한국전자통신연구원 고정 지연을 갖는 crc 검사장치 및 검사방법
US7287102B1 (en) 2003-01-31 2007-10-23 Marvell International Ltd. System and method for concatenating data
US7007114B1 (en) 2003-01-31 2006-02-28 Qlogic Corporation System and method for padding data blocks and/or removing padding from data blocks in storage controllers
US7064915B1 (en) 2003-03-10 2006-06-20 Marvell International Ltd. Method and system for collecting servo field data from programmable devices in embedded disk controllers
US7039771B1 (en) 2003-03-10 2006-05-02 Marvell International Ltd. Method and system for supporting multiple external serial port devices using a serial port controller in embedded disk controllers
US7870346B2 (en) 2003-03-10 2011-01-11 Marvell International Ltd. Servo controller interface module for embedded disk controllers
US7492545B1 (en) 2003-03-10 2009-02-17 Marvell International Ltd. Method and system for automatic time base adjustment for disk drive servo controllers
US7457903B2 (en) 2003-03-10 2008-11-25 Marvell International Ltd. Interrupt controller for processing fast and regular interrupts
US7278128B1 (en) * 2003-04-11 2007-10-02 Xilinx, Inc. Method of altering a bitstream
US7281196B2 (en) * 2003-08-08 2007-10-09 Matsushita Electric Industrial Co., Ltd. Single error Reed-Solomon decoder
US7526691B1 (en) 2003-10-15 2009-04-28 Marvell International Ltd. System and method for using TAP controllers
US7139150B2 (en) 2004-02-10 2006-11-21 Marvell International Ltd. Method and system for head position control in embedded disk drive controllers
US7120084B2 (en) 2004-06-14 2006-10-10 Marvell International Ltd. Integrated memory controller
US8166217B2 (en) 2004-06-28 2012-04-24 Marvell International Ltd. System and method for reading and writing data using storage controllers
US9201599B2 (en) 2004-07-19 2015-12-01 Marvell International Ltd. System and method for transmitting data in storage controllers
US8032674B2 (en) 2004-07-19 2011-10-04 Marvell International Ltd. System and method for controlling buffer memory overflow and underflow conditions in storage controllers
US7757009B2 (en) 2004-07-19 2010-07-13 Marvell International Ltd. Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device
US7426678B1 (en) * 2004-07-20 2008-09-16 Xilinx, Inc. Error checking parity and syndrome of a block of data with relocated parity bits
US7415656B2 (en) * 2004-09-27 2008-08-19 Intel Corporation Techniques to preserve bandwidth in a communication system
US7386661B2 (en) 2004-10-13 2008-06-10 Marvell International Ltd. Power save module for storage controllers
US7240267B2 (en) 2004-11-08 2007-07-03 Marvell International Ltd. System and method for conducting BIST operations
US7802026B2 (en) 2004-11-15 2010-09-21 Marvell International Ltd. Method and system for processing frames in storage controllers
US7609468B2 (en) 2005-04-06 2009-10-27 Marvell International Ltd. Method and system for read gate timing control for storage controllers
US7823049B2 (en) * 2006-03-15 2010-10-26 Mediatek Inc. Methods and apparatuses for generating parity symbols for data block
US8127211B2 (en) * 2007-06-20 2012-02-28 Texas Instruments Incorporated Adding known data to CRC processing without increased processing time
TWI416329B (zh) * 2009-01-06 2013-11-21 Starchips Technology Inc 串列傳輸裝置及其訊號傳輸方法
US8312329B1 (en) * 2011-06-13 2012-11-13 Litepoint Corporation System and method for using a single vector signal generator to verify device under test
EP3221969B1 (de) 2014-11-20 2022-05-11 Aviat Networks, Inc. Integritätsverwaltung von gerahmten nutzlasten mit redundanten signalen
CN111176885A (zh) * 2019-12-31 2020-05-19 浪潮电子信息产业股份有限公司 一种分布式存储系统的数据校验方法及相关装置

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JPS63255876A (ja) * 1987-04-14 1988-10-24 Matsushita Electric Ind Co Ltd 符号誤り検出方法
US4949342A (en) * 1987-04-14 1990-08-14 Matsushita Electric Industrial Co., Ltd. Code error detecting method
JP2695195B2 (ja) * 1988-09-02 1997-12-24 三菱電機株式会社 誤り訂正回路
US5027357A (en) * 1988-10-14 1991-06-25 Advanced Micro Devices, Inc. ECC/CRC error detection and correction system
US5157669A (en) * 1988-10-14 1992-10-20 Advanced Micro Devices, Inc. Comparison of an estimated CRC syndrome to a generated CRC syndrome in an ECC/CRC system to detect uncorrectable errors
US5136592A (en) * 1989-06-28 1992-08-04 Digital Equipment Corporation Error detection and correction system for long burst errors
CA2050123C (en) * 1990-10-11 1997-12-09 Subrahmanyam Dravida Apparatus and method for parallel generation of cyclic redundancy check (crc) codes

Also Published As

Publication number Publication date
EP0596340A3 (de) 1995-09-27
DE69323689T2 (de) 1999-07-22
EP0596340A2 (de) 1994-05-11
DE69328318D1 (de) 2000-05-11
EP0880237B1 (de) 2000-04-05
JPH06152437A (ja) 1994-05-31
US5361266A (en) 1994-11-01
EP0596340B1 (de) 1999-03-03
DE69328318T2 (de) 2000-09-07
EP0880237A1 (de) 1998-11-25
JP2821324B2 (ja) 1998-11-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee