DE69324637D1 - Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen - Google Patents

Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen

Info

Publication number
DE69324637D1
DE69324637D1 DE69324637T DE69324637T DE69324637D1 DE 69324637 D1 DE69324637 D1 DE 69324637D1 DE 69324637 T DE69324637 T DE 69324637T DE 69324637 T DE69324637 T DE 69324637T DE 69324637 D1 DE69324637 D1 DE 69324637D1
Authority
DE
Germany
Prior art keywords
integrated circuit
security system
implanted leads
circuit security
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69324637T
Other languages
English (en)
Other versions
DE69324637T2 (de
Inventor
James P Baukus
William M Clark
Lap-Wai Chow
Allan R Kramer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DirecTV Group Inc
Original Assignee
Hughes Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Electronics Corp filed Critical Hughes Electronics Corp
Application granted granted Critical
Publication of DE69324637D1 publication Critical patent/DE69324637D1/de
Publication of DE69324637T2 publication Critical patent/DE69324637T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/24—Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69324637T 1992-07-31 1993-07-28 Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen Expired - Lifetime DE69324637T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US92341192A 1992-07-31 1992-07-31

Publications (2)

Publication Number Publication Date
DE69324637D1 true DE69324637D1 (de) 1999-06-02
DE69324637T2 DE69324637T2 (de) 1999-12-30

Family

ID=25448650

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69333881T Expired - Lifetime DE69333881T2 (de) 1992-07-31 1993-07-28 Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen
DE69324637T Expired - Lifetime DE69324637T2 (de) 1992-07-31 1993-07-28 Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69333881T Expired - Lifetime DE69333881T2 (de) 1992-07-31 1993-07-28 Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen

Country Status (5)

Country Link
US (3) US5866933A (de)
EP (2) EP0940851B1 (de)
JP (1) JPH06163539A (de)
DE (2) DE69333881T2 (de)
IL (1) IL106513A (de)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0940851B1 (de) * 1992-07-31 2005-10-05 Hughes Electronics Corporation Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen
US5783846A (en) * 1995-09-22 1998-07-21 Hughes Electronics Corporation Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
JPH09293283A (ja) * 1996-04-25 1997-11-11 Hewlett Packard Co <Hp> プローブ装置およびその製造方法、ならびにメディア移動型メモリ装置
JP3405508B2 (ja) * 1997-05-30 2003-05-12 富士通株式会社 半導体集積回路
US5973375A (en) * 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants
DE19810730A1 (de) * 1998-03-12 1999-09-16 Philips Patentverwaltung Microcontrollerschaltung
DE19852072C2 (de) 1998-11-11 2001-10-18 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauelements mit einer stückweise im Substrat verlaufenden Verdrahtung
US6096580A (en) * 1999-09-24 2000-08-01 International Business Machines Corporation Low programming voltage anti-fuse
US6275072B1 (en) * 1999-10-07 2001-08-14 Velio Communications, Inc. Combined phase comparator and charge pump circuit
US6396368B1 (en) 1999-11-10 2002-05-28 Hrl Laboratories, Llc CMOS-compatible MEM switches and method of making
US6515304B1 (en) 2000-06-23 2003-02-04 International Business Machines Corporation Device for defeating reverse engineering of integrated circuits by optical means
JP4794030B2 (ja) * 2000-07-10 2011-10-12 ルネサスエレクトロニクス株式会社 半導体装置
US7217977B2 (en) * 2004-04-19 2007-05-15 Hrl Laboratories, Llc Covert transformation of transistor properties as a circuit protection method
US6815816B1 (en) * 2000-10-25 2004-11-09 Hrl Laboratories, Llc Implanted hidden interconnections in a semiconductor device for preventing reverse engineering
US6791191B2 (en) 2001-01-24 2004-09-14 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations
US7294935B2 (en) * 2001-01-24 2007-11-13 Hrl Laboratories, Llc Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide
JP4899248B2 (ja) * 2001-04-02 2012-03-21 富士通セミコンダクター株式会社 半導体集積回路
US6459629B1 (en) 2001-05-03 2002-10-01 Hrl Laboratories, Llc Memory with a bit line block and/or a word line block for preventing reverse engineering
US6774413B2 (en) * 2001-06-15 2004-08-10 Hrl Laboratories, Llc Integrated circuit structure with programmable connector/isolator
US6740942B2 (en) 2001-06-15 2004-05-25 Hrl Laboratories, Llc. Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact
US6897535B2 (en) 2002-05-14 2005-05-24 Hrl Laboratories, Llc Integrated circuit with reverse engineering protection
US7049667B2 (en) 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
US6924552B2 (en) * 2002-10-21 2005-08-02 Hrl Laboratories, Llc Multilayered integrated circuit with extraneous conductive traces
US6979606B2 (en) * 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
AU2003293540A1 (en) * 2002-12-13 2004-07-09 Raytheon Company Integrated circuit modification using well implants
EP2048708B1 (de) * 2003-02-04 2011-01-12 Panasonic Corporation Integrierte Halbleiterschaltung
JP2007528121A (ja) * 2003-07-11 2007-10-04 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 機密性を要する半導体製品、特にスマートカード・チップ
FR2865827A1 (fr) * 2004-01-29 2005-08-05 St Microelectronics Sa Securisation du mode de test d'un circuit integre
GB0410975D0 (en) 2004-05-17 2004-06-16 Nds Ltd Chip shielding system and method
US8296577B2 (en) * 2004-06-08 2012-10-23 Hrl Laboratories, Llc Cryptographic bus architecture for the prevention of differential power analysis
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
US8247840B2 (en) * 2004-07-07 2012-08-21 Semi Solutions, Llc Apparatus and method for improved leakage current of silicon on insulator transistors using a forward biased diode
US7683433B2 (en) * 2004-07-07 2010-03-23 Semi Solution, Llc Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors
US7375402B2 (en) * 2004-07-07 2008-05-20 Semi Solutions, Llc Method and apparatus for increasing stability of MOS memory cells
US7224205B2 (en) * 2004-07-07 2007-05-29 Semi Solutions, Llc Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors
US7651905B2 (en) * 2005-01-12 2010-01-26 Semi Solutions, Llc Apparatus and method for reducing gate leakage in deep sub-micron MOS transistors using semi-rectifying contacts
US7898297B2 (en) * 2005-01-04 2011-03-01 Semi Solution, Llc Method and apparatus for dynamic threshold voltage control of MOS transistors in dynamic logic circuits
DE102005028905A1 (de) * 2005-06-22 2006-12-28 Infineon Technologies Ag Transistorbauelement
FR2897439A1 (fr) * 2006-02-15 2007-08-17 St Microelectronics Sa Circuit elelctronique comprenant un mode de test securise par l'utilisation d'un identifiant, et procede associe
US7863689B2 (en) * 2006-09-19 2011-01-04 Semi Solutions, Llc. Apparatus for using a well current source to effect a dynamic threshold voltage of a MOS transistor
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US7994042B2 (en) * 2007-10-26 2011-08-09 International Business Machines Corporation Techniques for impeding reverse engineering
US7709401B2 (en) * 2008-02-22 2010-05-04 International Business Machines Corporation Method of making thermally programmable anti-reverse engineering interconnects wherein interconnects only conduct when heated above room temperature
US8418091B2 (en) * 2009-02-24 2013-04-09 Syphermedia International, Inc. Method and apparatus for camouflaging a standard cell based integrated circuit
US8510700B2 (en) 2009-02-24 2013-08-13 Syphermedia International, Inc. Method and apparatus for camouflaging a standard cell based integrated circuit with micro circuits and post processing
US10691860B2 (en) 2009-02-24 2020-06-23 Rambus Inc. Secure logic locking and configuration with camouflaged programmable micro netlists
US9735781B2 (en) 2009-02-24 2017-08-15 Syphermedia International, Inc. Physically unclonable camouflage structure and methods for fabricating same
US8151235B2 (en) * 2009-02-24 2012-04-03 Syphermedia International, Inc. Camouflaging a standard cell based integrated circuit
US8111089B2 (en) * 2009-05-28 2012-02-07 Syphermedia International, Inc. Building block for a secure CMOS logic cell library
JP2012054502A (ja) * 2010-09-03 2012-03-15 Elpida Memory Inc 半導体装置
US8975748B1 (en) 2011-06-07 2015-03-10 Secure Silicon Layer, Inc. Semiconductor device having features to prevent reverse engineering
US9218511B2 (en) 2011-06-07 2015-12-22 Verisiti, Inc. Semiconductor device having features to prevent reverse engineering
US9437555B2 (en) * 2011-06-07 2016-09-06 Verisiti, Inc. Semiconductor device having features to prevent reverse engineering
US9287879B2 (en) * 2011-06-07 2016-03-15 Verisiti, Inc. Semiconductor device having features to prevent reverse engineering
US9484110B2 (en) 2013-07-29 2016-11-01 Qualcomm Incorporated Mask-programmed read only memory with enhanced security
US9479176B1 (en) 2013-12-09 2016-10-25 Rambus Inc. Methods and circuits for protecting integrated circuits from reverse engineering
US10568202B2 (en) 2017-07-25 2020-02-18 International Business Machines Corporation Tamper-respondent assembly with interconnect characteristic(s) obscuring circuit layout
US11695011B2 (en) 2018-05-02 2023-07-04 Nanyang Technological University Integrated circuit layout cell, integrated circuit layout arrangement, and methods of forming the same
US10923596B2 (en) 2019-03-08 2021-02-16 Rambus Inc. Camouflaged FinFET and method for producing same

Family Cites Families (68)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3946426A (en) * 1973-03-14 1976-03-23 Harris Corporation Interconnect system for integrated circuits
US4267578A (en) * 1974-08-26 1981-05-12 Texas Instruments Incorporated Calculator system with anti-theft feature
US4139864A (en) * 1976-01-14 1979-02-13 Schulman Lawrence S Security system for a solid state device
NL185376C (nl) 1976-10-25 1990-03-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
US4164461A (en) * 1977-01-03 1979-08-14 Raytheon Company Semiconductor integrated circuit structures and manufacturing methods
JPS54157092A (en) * 1978-05-31 1979-12-11 Nec Corp Semiconductor integrated circuit device
NL7903158A (nl) 1979-04-23 1980-10-27 Philips Nv Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze.
US4291391A (en) * 1979-09-14 1981-09-22 Texas Instruments Incorporated Taper isolated random access memory array and method of operating
US4295897B1 (en) 1979-10-03 1997-09-09 Texas Instruments Inc Method of making cmos integrated circuit device
US4317273A (en) 1979-11-13 1982-03-02 Texas Instruments Incorporated Method of making high coupling ratio DMOS electrically programmable ROM
NL8003612A (nl) 1980-06-23 1982-01-18 Philips Nv Werkwijze ter vervaardiging van een halfgeleider- inrichting en halfgeleiderinrichting vervaardigd door toepassing van deze werkwijze.
FR2486717A1 (fr) * 1980-07-08 1982-01-15 Dassault Electronique Dispositif de transistor pour circuit integre
US4471376A (en) * 1981-01-14 1984-09-11 Harris Corporation Amorphous devices and interconnect system and method of fabrication
JPS5856355A (ja) * 1981-09-30 1983-04-04 Hitachi Ltd 半導体集積回路装置
US4435895A (en) 1982-04-05 1984-03-13 Bell Telephone Laboratories, Incorporated Process for forming complementary integrated circuit devices
JPS58190064A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd 半導体集積回路
US4603381A (en) * 1982-06-30 1986-07-29 Texas Instruments Incorporated Use of implant process for programming ROM type processor for encryption
JPS598352A (ja) 1982-07-05 1984-01-17 Nippon Gakki Seizo Kk 半導体装置の製法
US4623255A (en) * 1983-10-13 1986-11-18 The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration Method of examining microcircuit patterns
US4583011A (en) * 1983-11-01 1986-04-15 Standard Microsystems Corp. Circuit to prevent pirating of an MOS circuit
US4727493A (en) * 1984-05-04 1988-02-23 Integrated Logic Systems, Inc. Integrated circuit architecture and fabrication method therefor
US4821085A (en) * 1985-05-01 1989-04-11 Texas Instruments Incorporated VLSI local interconnect structure
US4975756A (en) * 1985-05-01 1990-12-04 Texas Instruments Incorporated SRAM with local interconnect
JPH06101551B2 (ja) 1985-11-30 1994-12-12 日本電信電話株式会社 Ｃｍｏｓ集積回路装置
DE3705173A1 (de) * 1986-02-28 1987-09-03 Canon Kk Halbleitervorrichtung
EP0248267A3 (de) * 1986-06-06 1990-04-25 Siemens Aktiengesellschaft Monolithisch integrierte Schaltung mit zueinander parallelen Schaltungszweigen
JPS63129647A (ja) * 1986-11-20 1988-06-02 Fujitsu Ltd 半導体装置
US5065208A (en) * 1987-01-30 1991-11-12 Texas Instruments Incorporated Integrated bipolar and CMOS transistor with titanium nitride interconnections
US4766516A (en) * 1987-09-24 1988-08-23 Hughes Aircraft Company Method and apparatus for securing integrated circuits from unauthorized copying and use
US4830974A (en) 1988-01-11 1989-05-16 Atmel Corporation EPROM fabrication process
JPH0246762A (ja) * 1988-08-09 1990-02-16 Mitsubishi Electric Corp 半導体集積回路
US5168340A (en) 1988-08-17 1992-12-01 Texas Instruments Incorporated Semiconductor integrated circuit device with guardring regions to prevent the formation of an MOS diode
JPH0777239B2 (ja) * 1988-09-22 1995-08-16 日本電気株式会社 浮遊ゲート型不揮発性半導体記憶装置
JPH02201935A (ja) * 1988-12-02 1990-08-10 Ncr Corp コピー防止付回路ロジツク
JPH02290043A (ja) * 1989-02-02 1990-11-29 Mitsubishi Electric Corp 半導体装置
US5227649A (en) * 1989-02-27 1993-07-13 Texas Instruments Incorporated Circuit layout and method for VLSI circuits having local interconnects
JPH02237038A (ja) * 1989-03-09 1990-09-19 Ricoh Co Ltd 半導体装置
EP0642168B1 (de) * 1989-07-18 1998-09-23 Sony Corporation Nichtflüchtige Halbleiterspeicheranordnung
US5030796A (en) * 1989-08-11 1991-07-09 Rockwell International Corporation Reverse-engineering resistant encapsulant for microelectric device
US5117276A (en) * 1989-08-14 1992-05-26 Fairchild Camera And Instrument Corp. High performance interconnect system for an integrated circuit
JP2501428Y2 (ja) * 1989-12-22 1996-06-19 株式会社リコー 熱複写装置
FR2656939B1 (fr) * 1990-01-09 1992-04-03 Sgs Thomson Microelectronics Verrous de securite pour circuit integre.
US5124774A (en) * 1990-01-12 1992-06-23 Paradigm Technology, Inc. Compact SRAM cell layout
JPH0828120B2 (ja) * 1990-05-23 1996-03-21 株式会社東芝 アドレスデコード回路
US5132571A (en) * 1990-08-01 1992-07-21 Actel Corporation Programmable interconnect architecture having interconnects disposed above function modules
EP0481703B1 (de) 1990-10-15 2003-09-17 Aptix Corporation Verbindungssubstrat mit integrierter Schaltung zur programmierbaren Verbindung und Probenuntersuchung
US5050123A (en) * 1990-11-13 1991-09-17 Intel Corporation Radiation shield for EPROM cells
JP3027990B2 (ja) * 1991-03-18 2000-04-04 富士通株式会社 半導体装置の製造方法
US5146117A (en) * 1991-04-01 1992-09-08 Hughes Aircraft Company Convertible multi-function microelectronic logic gate structure and method of fabricating the same
JP3110799B2 (ja) * 1991-06-28 2000-11-20 株式会社東芝 半導体装置
JPH06204414A (ja) * 1991-07-31 1994-07-22 Texas Instr Inc <Ti> Ｃｍｏｓ集積回路のチャネルストップ構造
US5202591A (en) * 1991-08-09 1993-04-13 Hughes Aircraft Company Dynamic circuit disguise for microelectronic integrated digital logic circuits
JP3118899B2 (ja) * 1991-10-01 2000-12-18 日本電気株式会社 アライメントチェックパターン
JPH05136125A (ja) * 1991-11-14 1993-06-01 Hitachi Ltd クロツク配線及びクロツク配線を有する半導体集積回路装置
US5231299A (en) * 1992-03-24 1993-07-27 International Business Machines Corporation Structure and fabrication method for EEPROM memory cell with selective channel implants
JPH05275529A (ja) 1992-03-27 1993-10-22 Matsushita Electron Corp 半導体集積回路の製造方法
JPH05304207A (ja) 1992-04-28 1993-11-16 Oki Electric Ind Co Ltd 半導体装置の素子間分離兼配線構造
US5384472A (en) 1992-06-10 1995-01-24 Aspec Technology, Inc. Symmetrical multi-layer metal logic array with continuous substrate taps and extension portions for increased gate density
EP0940851B1 (de) 1992-07-31 2005-10-05 Hughes Electronics Corporation Sicherheitssystem für eine integrierte Schaltung und Verfahren mit implantierten Verbindungen
US5369299A (en) * 1993-07-22 1994-11-29 National Semiconductor Corporation Tamper resistant integrated circuit structure
US5468990A (en) * 1993-07-22 1995-11-21 National Semiconductor Corp. Structures for preventing reverse engineering of integrated circuits
US5354704A (en) * 1993-07-28 1994-10-11 United Microelectronics Corporation Symmetric SRAM cell with buried N+ local interconnection line
US5721150A (en) 1993-10-25 1998-02-24 Lsi Logic Corporation Use of silicon for integrated circuit device interconnection by direct writing of patterns therein
US5399441A (en) * 1994-04-12 1995-03-21 Dow Corning Corporation Method of applying opaque coatings
US5475251A (en) * 1994-05-31 1995-12-12 National Semiconductor Corporation Secure non-volatile memory cell
US5376577A (en) * 1994-06-30 1994-12-27 Micron Semiconductor, Inc. Method of forming a low resistive current path between a buried contact and a diffusion region
US5783846A (en) 1995-09-22 1998-07-21 Hughes Electronics Corporation Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
US5973375A (en) 1997-06-06 1999-10-26 Hughes Electronics Corporation Camouflaged circuit structure with step implants

Also Published As

Publication number Publication date
JPH06163539A (ja) 1994-06-10
US6613661B1 (en) 2003-09-02
EP0940851A1 (de) 1999-09-08
US6294816B1 (en) 2001-09-25
DE69324637T2 (de) 1999-12-30
EP0940851B1 (de) 2005-10-05
US5866933A (en) 1999-02-02
EP0585601B1 (de) 1999-04-28
DE69333881T2 (de) 2006-07-13
IL106513A (en) 1997-03-18
DE69333881D1 (de) 2006-02-16
EP0585601A1 (de) 1994-03-09

Similar Documents

Publication Publication Date Title
DE69324637D1 (de) Sicherheitssystem für integrierte Schaltung und Verfahren mit implantierten Leitungen
DE69127453T2 (de) Verfahren und system mit verringerter fernzugriffszeit
DE69429740T2 (de) Integriertes automatisches Entwicklungssystem und zugehöriges Verfahren
DE69318944T2 (de) Lagebestimmungssystem und Verfahren
DE69008105T2 (de) Fahrzeugausrüstungs-Stellregeleinrichtung und Verfahren.
DE69422580T2 (de) Elektronisches Postwiegesystem und Verfahren
DE69119787T2 (de) Apherese verfahren und vorrichtung dafuer
DE68925529D1 (de) Abschätzung-positionierungssystem und verfahren
DE69326619D1 (de) Venturiwäscher, system und verfahren
DE69331311T2 (de) Datenkommunikationssystem und Verfahren
DE69327562T2 (de) Kommunikationssystem und Verfahren
DE69031155D1 (de) Taktverteilsystem und Verfahren
DE69124966T2 (de) Drucksystem und Verfahren mit einteiligem Gehäuse
DE69319978D1 (de) Speicherkarte mit IC und Verfahren zur Herstellung derselben
DE69331646D1 (de) Graphisches System und Verfahren
DE69233683D1 (de) Kommunikationsgerät und Verfahren
DE69430006T2 (de) Verbindungen und verfahren
DE69329439D1 (de) Verfahren und Einrichtung zur Kodierung
DE69126888D1 (de) Sitzeinrichtung und verfahren
DE69107229D1 (de) Ausfällungsvorrichtung und Verfahren.
DE69328601T2 (de) Elektronisches Bildverarbeitungssystem und -methode
DE69220254D1 (de) IC-Karte und Verfahren zur Herstellung derselben
DE69423170T2 (de) System und Verfahren zum Schaltungsentwurf
DE69517718D1 (de) Datenreorganisationsschaltung und Verfahren
DE69314158T2 (de) Elektronisches bauelement und dessen herstellungsverfahren

Legal Events

Date Code Title Description
8364 No opposition during term of opposition