DE69327389D1 - Verfahren zum Prüfen von Entwürfen für programmierbare Logikschaltungen - Google Patents

Verfahren zum Prüfen von Entwürfen für programmierbare Logikschaltungen

Info

Publication number
DE69327389D1
DE69327389D1 DE69327389T DE69327389T DE69327389D1 DE 69327389 D1 DE69327389 D1 DE 69327389D1 DE 69327389 T DE69327389 T DE 69327389T DE 69327389 T DE69327389 T DE 69327389T DE 69327389 D1 DE69327389 D1 DE 69327389D1
Authority
DE
Germany
Prior art keywords
procedure
programmable logic
logic circuits
testing designs
designs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69327389T
Other languages
English (en)
Other versions
DE69327389T2 (de
Inventor
Brent Alan Fairbanks
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altera Corp filed Critical Altera Corp
Application granted granted Critical
Publication of DE69327389D1 publication Critical patent/DE69327389D1/de
Publication of DE69327389T2 publication Critical patent/DE69327389T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
DE69327389T 1992-10-29 1993-10-29 Verfahren zum Prüfen von Entwürfen für programmierbare Logikschaltungen Expired - Fee Related DE69327389T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US96859392A 1992-10-29 1992-10-29

Publications (2)

Publication Number Publication Date
DE69327389D1 true DE69327389D1 (de) 2000-01-27
DE69327389T2 DE69327389T2 (de) 2000-06-15

Family

ID=25514470

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69327389T Expired - Fee Related DE69327389T2 (de) 1992-10-29 1993-10-29 Verfahren zum Prüfen von Entwürfen für programmierbare Logikschaltungen

Country Status (3)

Country Link
US (3) US6182020B1 (de)
EP (1) EP0600608B1 (de)
DE (1) DE69327389T2 (de)

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Also Published As

Publication number Publication date
US7398483B2 (en) 2008-07-08
EP0600608B1 (de) 1999-12-22
US6601221B1 (en) 2003-07-29
DE69327389T2 (de) 2000-06-15
US20030182645A1 (en) 2003-09-25
US6182020B1 (en) 2001-01-30
EP0600608A1 (de) 1994-06-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee