DE69408922T2 - Adressumsetzungscache-Speicher zur Umwandlung von virtuellen Adressen in physikalische Adressen, der mehrere Seitengrössen unterstützt - Google Patents

Adressumsetzungscache-Speicher zur Umwandlung von virtuellen Adressen in physikalische Adressen, der mehrere Seitengrössen unterstützt

Info

Publication number
DE69408922T2
DE69408922T2 DE69408922T DE69408922T DE69408922T2 DE 69408922 T2 DE69408922 T2 DE 69408922T2 DE 69408922 T DE69408922 T DE 69408922T DE 69408922 T DE69408922 T DE 69408922T DE 69408922 T2 DE69408922 T2 DE 69408922T2
Authority
DE
Germany
Prior art keywords
addresses
address translation
supports multiple
multiple page
page sizes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69408922T
Other languages
English (en)
Other versions
DE69408922D1 (de
Inventor
Yousef A Khalidi
Glen R Anderson
Stephen A Chessin
Shing Ip Kong
Charles E Narad
Madhusudhan Talluri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69408922D1 publication Critical patent/DE69408922D1/de
Application granted granted Critical
Publication of DE69408922T2 publication Critical patent/DE69408922T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/652Page size control
DE69408922T 1993-09-08 1994-08-05 Adressumsetzungscache-Speicher zur Umwandlung von virtuellen Adressen in physikalische Adressen, der mehrere Seitengrössen unterstützt Expired - Fee Related DE69408922T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/118,398 US5479627A (en) 1993-09-08 1993-09-08 Virtual address to physical address translation cache that supports multiple page sizes

Publications (2)

Publication Number Publication Date
DE69408922D1 DE69408922D1 (de) 1998-04-16
DE69408922T2 true DE69408922T2 (de) 1998-11-26

Family

ID=22378330

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69408922T Expired - Fee Related DE69408922T2 (de) 1993-09-08 1994-08-05 Adressumsetzungscache-Speicher zur Umwandlung von virtuellen Adressen in physikalische Adressen, der mehrere Seitengrössen unterstützt

Country Status (4)

Country Link
US (2) US5479627A (de)
EP (1) EP0642086B1 (de)
JP (1) JPH07200409A (de)
DE (1) DE69408922T2 (de)

Families Citing this family (132)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6336180B1 (en) 1997-04-30 2002-01-01 Canon Kabushiki Kaisha Method, apparatus and system for managing virtual memory with virtual-physical mapping
DE69428881T2 (de) * 1994-01-12 2002-07-18 Sun Microsystems Inc Logisch adressierbarer physikalischer Speicher für ein Rechnersystem mit virtuellem Speicher, das mehrere Seitengrössen unterstützt
US5652872A (en) * 1994-03-08 1997-07-29 Exponential Technology, Inc. Translator having segment bounds encoding for storage in a TLB
US5751990A (en) * 1994-04-26 1998-05-12 International Business Machines Corporation Abridged virtual address cache directory
WO1996002035A1 (de) * 1994-07-09 1996-01-25 Gmd-Forschungszentrum Informationstechnik Gmbh Verfahren zum umsetzen einer virtuellen adresse in eine reale adresse
JP3740195B2 (ja) * 1994-09-09 2006-02-01 株式会社ルネサステクノロジ データ処理装置
US5694567A (en) * 1995-02-09 1997-12-02 Integrated Device Technology, Inc. Direct-mapped cache with cache locking allowing expanded contiguous memory storage by swapping one or more tag bits with one or more index bits
US5680566A (en) * 1995-03-03 1997-10-21 Hal Computer Systems, Inc. Lookaside buffer for inputting multiple address translations in a computer system
US5897660A (en) * 1995-04-07 1999-04-27 Intel Corporation Method for managing free physical pages that reduces trashing to improve system performance
US5623692A (en) * 1995-05-15 1997-04-22 Nvidia Corporation Architecture for providing input/output operations in a computer system
US5640591A (en) * 1995-05-15 1997-06-17 Nvidia Corporation Method and apparatus for naming input/output devices in a computer system
US5732404A (en) * 1996-03-29 1998-03-24 Unisys Corporation Flexible expansion of virtual memory addressing
US5809562A (en) * 1996-05-20 1998-09-15 Integrated Device Technology, Inc. Cache array select logic allowing cache array size to differ from physical page size
US5860147A (en) * 1996-09-16 1999-01-12 Intel Corporation Method and apparatus for replacement of entries in a translation look-aside buffer
US6175906B1 (en) * 1996-12-06 2001-01-16 Advanced Micro Devices, Inc. Mechanism for fast revalidation of virtual tags
US5897666A (en) * 1996-12-09 1999-04-27 International Business Machines Corporation Generation of unique address alias for memory disambiguation buffer to avoid false collisions
US5918251A (en) * 1996-12-23 1999-06-29 Intel Corporation Method and apparatus for preloading different default address translation attributes
US5822576A (en) * 1997-03-26 1998-10-13 International Business Machines Corporation Branch history table with branch pattern field
US6012132A (en) * 1997-03-31 2000-01-04 Intel Corporation Method and apparatus for implementing a page table walker that uses a sliding field in the virtual addresses to identify entries in a page table
US6088780A (en) * 1997-03-31 2000-07-11 Institute For The Development Of Emerging Architecture, L.L.C. Page table walker that uses at least one of a default page size and a page size selected for a virtual address space to position a sliding field in a virtual address
US6182201B1 (en) * 1997-04-14 2001-01-30 International Business Machines Corporation Demand-based issuance of cache operations to a system bus
KR100263672B1 (ko) * 1997-05-08 2000-09-01 김영환 가변적인 페이지 크기를 지원하는 어드레스 변환장치
US6065010A (en) * 1997-06-10 2000-05-16 Daikin Us Corporation Computer implemented method of generating virtual files for sharing information of physical information file
US6249853B1 (en) 1997-06-25 2001-06-19 Micron Electronics, Inc. GART and PTES defined by configuration registers
US6282625B1 (en) 1997-06-25 2001-08-28 Micron Electronics, Inc. GART and PTES defined by configuration registers
US6069638A (en) * 1997-06-25 2000-05-30 Micron Electronics, Inc. System for accelerated graphics port address remapping interface to main memory
US5899994A (en) * 1997-06-26 1999-05-04 Sun Microsystems, Inc. Flexible translation storage buffers for virtual address translation
JP3264319B2 (ja) * 1997-06-30 2002-03-11 日本電気株式会社 バスブリッジ
US6192457B1 (en) 1997-07-02 2001-02-20 Micron Technology, Inc. Method for implementing a graphic address remapping table as a virtual register file in system memory
US6195734B1 (en) 1997-07-02 2001-02-27 Micron Technology, Inc. System for implementing a graphic address remapping table as a virtual register file in system memory
US6055617A (en) * 1997-08-29 2000-04-25 Sequent Computer Systems, Inc. Virtual address window for accessing physical memory in a computer system
US5999743A (en) * 1997-09-09 1999-12-07 Compaq Computer Corporation System and method for dynamically allocating accelerated graphics port memory space
US5905509A (en) * 1997-09-30 1999-05-18 Compaq Computer Corp. Accelerated Graphics Port two level Gart cache having distributed first level caches
US5936640A (en) * 1997-09-30 1999-08-10 Compaq Computer Corporation Accelerated graphics port memory mapped status and control registers
US5949436A (en) * 1997-09-30 1999-09-07 Compaq Computer Corporation Accelerated graphics port multiple entry gart cache allocation system and method
US5986677A (en) * 1997-09-30 1999-11-16 Compaq Computer Corporation Accelerated graphics port read transaction merging
US6057863A (en) * 1997-10-31 2000-05-02 Compaq Computer Corporation Dual purpose apparatus, method and system for accelerated graphics port and fibre channel arbitrated loop interfaces
US6252612B1 (en) 1997-12-30 2001-06-26 Micron Electronics, Inc. Accelerated graphics port for multiple memory controller computer system
US6157398A (en) 1997-12-30 2000-12-05 Micron Technology, Inc. Method of implementing an accelerated graphics port for a multiple memory controller computer system
US7071946B2 (en) * 1997-12-30 2006-07-04 Micron Technology, Inc. Accelerated graphics port for a multiple memory controller computer system
US6289431B1 (en) * 1998-01-26 2001-09-11 Intel Corporation Method and apparatus for accessing more than 4 Gigabytes of physical memory with 4-byte table entries
US6625718B1 (en) * 1998-02-05 2003-09-23 Avaya Technology Corp. Pointers that are relative to their own present locations
US6081881A (en) * 1998-02-20 2000-06-27 Unisys Corporation Method of and apparatus for speeding up the execution of normal extended mode transfer instructions
US6108761A (en) * 1998-02-20 2000-08-22 Unisys Corporation Method of and apparatus for saving time performing certain transfer instructions
US6078338A (en) * 1998-03-11 2000-06-20 Compaq Computer Corporation Accelerated graphics port programmable memory access arbiter
US6230223B1 (en) 1998-06-01 2001-05-08 Compaq Computer Corporation Dual purpose apparatus method and system for accelerated graphics or second memory interface
US6594701B1 (en) 1998-08-04 2003-07-15 Microsoft Corporation Credit-based methods and systems for controlling data flow between a sender and a receiver with reduced copying of data
US6321276B1 (en) 1998-08-04 2001-11-20 Microsoft Corporation Recoverable methods and systems for processing input/output requests including virtual memory addresses
US6223239B1 (en) 1998-08-12 2001-04-24 Compaq Computer Corporation Dual purpose apparatus, method and system for accelerated graphics port or system area network interface
JP2000057054A (ja) * 1998-08-12 2000-02-25 Fujitsu Ltd 高速アドレス変換システム
US6167476A (en) * 1998-09-24 2000-12-26 Compaq Computer Corporation Apparatus, method and system for accelerated graphics port bus bridges
US6457068B1 (en) * 1999-08-30 2002-09-24 Intel Corporation Graphics address relocation table (GART) stored entirely in a local memory of an expansion bridge for address translation
US6857058B1 (en) * 1999-10-04 2005-02-15 Intel Corporation Apparatus to map pages of disparate sizes and associated methods
US6970992B2 (en) * 1999-10-04 2005-11-29 Intel Corporation Apparatus to map virtual pages to disparate-sized, non-contiguous real pages and methods relating thereto
JP2001184870A (ja) * 1999-12-27 2001-07-06 Mitsubishi Electric Corp 連想メモリ装置およびそれを用いた可変長符号復号装置
US6625715B1 (en) * 1999-12-30 2003-09-23 Intel Corporation System and method for translation buffer accommodating multiple page sizes
US7124286B2 (en) 2000-01-14 2006-10-17 Advanced Micro Devices, Inc. Establishing an operating mode in a processor
US6973562B1 (en) * 2000-01-14 2005-12-06 Advanced Micro Devices, Inc. Establishing an operating mode in a processor
US6598050B1 (en) * 2000-02-11 2003-07-22 Integrated Device Technology, Inc. Apparatus and method for limited data sharing in a multi-tasking system
US7133951B1 (en) 2000-02-29 2006-11-07 Bourekas Philip A Alternate set of registers to service critical interrupts and operating system traps
US6901481B2 (en) 2000-04-14 2005-05-31 Stratus Technologies Bermuda Ltd. Method and apparatus for storing transactional information in persistent memory
US6802022B1 (en) 2000-04-14 2004-10-05 Stratus Technologies Bermuda Ltd. Maintenance of consistent, redundant mass storage images
US7058791B1 (en) 2000-08-09 2006-06-06 Advanced Micro Devices, Inc. Establishing a mode indication responsive to two or more indications
US6807622B1 (en) 2000-08-09 2004-10-19 Advanced Micro Devices, Inc. Processor which overrides default operand size for implicit stack pointer references and near branches
US7100028B2 (en) * 2000-08-09 2006-08-29 Advanced Micro Devices, Inc. Multiple entry points for system call instructions
US6742103B2 (en) 2000-08-21 2004-05-25 Texas Instruments Incorporated Processing system with shared translation lookaside buffer
EP1262875A1 (de) * 2001-05-28 2002-12-04 Texas Instruments Incorporated Master-Slave-Prozessorsystem mit gemeinsamem Adressenübersetzungspufferspeicher
EP1182571B1 (de) * 2000-08-21 2011-01-26 Texas Instruments Incorporated Auf gemeinsamem Bit basierte TLB-Operationen
US6742104B2 (en) 2000-08-21 2004-05-25 Texas Instruments Incorporated Master/slave processing system with shared translation lookaside buffer
US20020133742A1 (en) * 2001-01-16 2002-09-19 Hsiu-Ying Hsu DRAM memory page operation method and its structure
US6886171B2 (en) * 2001-02-20 2005-04-26 Stratus Technologies Bermuda Ltd. Caching for I/O virtual address translation and validation using device drivers
US6766413B2 (en) 2001-03-01 2004-07-20 Stratus Technologies Bermuda Ltd. Systems and methods for caching with file-level granularity
US6549997B2 (en) * 2001-03-16 2003-04-15 Fujitsu Limited Dynamic variable page size translation of addresses
US6938144B2 (en) * 2001-03-22 2005-08-30 Matsushita Electric Industrial Co., Ltd. Address conversion unit for memory device
US6807617B2 (en) 2001-04-02 2004-10-19 Advanced Micro Devices, Inc. Processor, method and apparatus with descriptor table storing segment descriptors of varying size
ATE545909T1 (de) * 2001-05-28 2012-03-15 Texas Instruments Inc Multiprozessorsystem mit gemeinsamem adressenübersetzungspufferspeicher
GB2395307A (en) * 2002-11-15 2004-05-19 Quadrics Ltd Virtual to physical memory mapping in network interfaces
US7900017B2 (en) * 2002-12-27 2011-03-01 Intel Corporation Mechanism for remapping post virtual machine memory pages
US7089397B1 (en) 2003-07-03 2006-08-08 Transmeta Corporation Method and system for caching attribute data for matching attributes with physical addresses
US7188229B2 (en) * 2004-01-17 2007-03-06 Sun Microsystems, Inc. Method and apparatus for memory management in a multi-processor computer system
US7296139B1 (en) 2004-01-30 2007-11-13 Nvidia Corporation In-memory table structure for virtual address translation system with translation units of variable range size
US7278008B1 (en) 2004-01-30 2007-10-02 Nvidia Corporation Virtual address translation system with caching of variable-range translation clusters
US7334108B1 (en) 2004-01-30 2008-02-19 Nvidia Corporation Multi-client virtual address translation system with translation units of variable-range size
US7451271B2 (en) * 2004-04-05 2008-11-11 Marvell International Ltd. Physically-tagged cache with virtually-tagged fill buffers
US7418582B1 (en) 2004-05-13 2008-08-26 Sun Microsystems, Inc. Versatile register file design for a multi-threaded processor utilizing different modes and register windows
US7509484B1 (en) 2004-06-30 2009-03-24 Sun Microsystems, Inc. Handling cache misses by selectively flushing the pipeline
US7543132B1 (en) 2004-06-30 2009-06-02 Sun Microsystems, Inc. Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes
US20060004983A1 (en) * 2004-06-30 2006-01-05 Tsao Gary Y Method, system, and program for managing memory options for devices
US7571284B1 (en) 2004-06-30 2009-08-04 Sun Microsystems, Inc. Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor
US7366829B1 (en) 2004-06-30 2008-04-29 Sun Microsystems, Inc. TLB tag parity checking without CAM read
US7290116B1 (en) 2004-06-30 2007-10-30 Sun Microsystems, Inc. Level 2 cache index hashing to avoid hot spots
US7390551B2 (en) * 2004-07-02 2008-06-24 Caterpillar Inc. System and method for encapsulation and protection of components
US7418572B2 (en) * 2004-08-18 2008-08-26 International Business Machines Corporation Pretranslating input/output buffers in environments with multiple page sizes
US7685400B2 (en) * 2004-12-15 2010-03-23 International Business Machines Corporation Storage of data blocks of logical volumes in a virtual disk storage subsystem
US7370174B2 (en) * 2005-01-05 2008-05-06 Intel Corporation Method, system, and program for addressing pages of memory by an I/O device
US20060224857A1 (en) 2005-03-29 2006-10-05 O'connor Dennis M Locking entries into translation lookaside buffers
US7386669B2 (en) * 2005-03-31 2008-06-10 International Business Machines Corporation System and method of improving task switching and page translation performance utilizing a multilevel translation lookaside buffer
US7853957B2 (en) * 2005-04-15 2010-12-14 Intel Corporation Doorbell mechanism using protection domains
JP4160589B2 (ja) * 2005-10-31 2008-10-01 富士通株式会社 演算処理装置,情報処理装置,及び演算処理装置のメモリアクセス方法
JP4783229B2 (ja) * 2006-07-19 2011-09-28 パナソニック株式会社 キャッシュメモリシステム
US20080028181A1 (en) * 2006-07-31 2008-01-31 Nvidia Corporation Dedicated mechanism for page mapping in a gpu
US7957951B2 (en) * 2007-03-16 2011-06-07 Robert Bosch Gmbh Address translation system for use in a simulation environment
US20080276067A1 (en) * 2007-05-01 2008-11-06 Via Technologies, Inc. Method and Apparatus for Page Table Pre-Fetching in Zero Frame Display Channel
JP4608011B2 (ja) * 2007-06-19 2011-01-05 富士通株式会社 演算処理装置および演算処理方法
US9153211B1 (en) * 2007-12-03 2015-10-06 Nvidia Corporation Method and system for tracking accesses to virtual addresses in graphics contexts
US7930515B2 (en) * 2008-07-29 2011-04-19 International Business Machines Corporation Virtual memory management
WO2012015766A2 (en) 2010-07-28 2012-02-02 Rambus Inc. Cache memory that supports tagless addressing
JP5702808B2 (ja) * 2011-01-12 2015-04-15 パナソニック株式会社 プログラム実行装置およびコンパイラシステム
DE102011052510A1 (de) * 2011-08-09 2013-02-14 Dspace Digital Signal Processing And Control Engineering Gmbh Verfahren zur Verarbeitung von Daten eines Steuergeräts in einem Datenkommunikationsgerät
JP2013073270A (ja) * 2011-09-26 2013-04-22 Fujitsu Ltd アドレス変換装置、演算処理装置及び演算処理装置の制御方法
US9152570B2 (en) * 2012-02-27 2015-10-06 Vmware, Inc. System and method for supporting finer-grained copy-on-write page sizes
US9753860B2 (en) 2012-06-14 2017-09-05 International Business Machines Corporation Page table entry consolidation
US9092359B2 (en) 2012-06-14 2015-07-28 International Business Machines Corporation Identification and consolidation of page table entries
US9811472B2 (en) * 2012-06-14 2017-11-07 International Business Machines Corporation Radix table translation of memory
WO2014016650A1 (en) * 2012-07-27 2014-01-30 Freescale Semiconductor, Inc. Circuitry for a computing system and computing system
US10216642B2 (en) * 2013-03-15 2019-02-26 International Business Machines Corporation Hardware-based pre-page walk virtual address transformation where the virtual address is shifted by current page size and a minimum page size
TWI489279B (zh) * 2013-11-27 2015-06-21 Realtek Semiconductor Corp 虛擬實體位址轉換系統以及虛擬實體位址轉換系統的管理方法
US9612970B2 (en) 2014-07-17 2017-04-04 Qualcomm Incorporated Method and apparatus for flexible cache partitioning by sets and ways into component caches
US10089238B2 (en) 2014-07-17 2018-10-02 Qualcomm Incorporated Method and apparatus for a shared cache with dynamic partitioning
US9495303B2 (en) * 2015-02-03 2016-11-15 Intel Corporation Fine grained address remapping for virtualization
CN114546492A (zh) * 2015-04-24 2022-05-27 优创半导体科技有限公司 使用目标寄存器实现虚拟地址的预转换的计算机处理器
US10180908B2 (en) 2015-05-13 2019-01-15 Qualcomm Incorporated Method and apparatus for virtualized control of a shared system cache
US9424155B1 (en) 2016-01-27 2016-08-23 International Business Machines Corporation Use efficiency of platform memory resources through firmware managed I/O translation table paging
CN108139981B (zh) * 2016-08-11 2020-08-14 华为技术有限公司 一种页表缓存tlb中表项的访问方法,及处理芯片
US10719451B2 (en) * 2017-01-13 2020-07-21 Optimum Semiconductor Technologies Inc. Variable translation-lookaside buffer (TLB) indexing
CN108804350B (zh) * 2017-04-27 2020-02-21 华为技术有限公司 一种内存访问方法及计算机系统
US11082231B2 (en) * 2017-12-29 2021-08-03 Intel Corporation Indirection directories for cryptographic memory protection
US10970390B2 (en) * 2018-02-15 2021-04-06 Intel Corporation Mechanism to prevent software side channels
US10642728B2 (en) 2018-02-28 2020-05-05 Micron Technology, Inc. Storage class memory status
US10769076B2 (en) 2018-11-21 2020-09-08 Nvidia Corporation Distributed address translation in a multi-node interconnect fabric
US11088846B2 (en) * 2019-03-28 2021-08-10 Intel Corporation Key rotating trees with split counters for efficient hardware replay protection
US20230169013A1 (en) * 2021-12-01 2023-06-01 Samsung Electronics Co., Ltd. Address translation cache and system including the same

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR10582E (fr) * 1970-06-29 1909-07-30 Paul Alexis Victor Lerolle Jeu de serrures avec passe-partout
US4285040A (en) * 1977-11-04 1981-08-18 Sperry Corporation Dual mode virtual-to-real address translation mechanism
US4763250A (en) * 1985-04-01 1988-08-09 Motorola, Inc. Paged memory management unit having variable number of translation table levels
JPS62237547A (ja) * 1986-04-09 1987-10-17 Hitachi Ltd アドレス変換方式
US4914577A (en) * 1987-07-16 1990-04-03 Icon International, Inc. Dynamic memory management system and method
US5058003A (en) * 1988-12-15 1991-10-15 International Business Machines Corporation Virtual storage dynamic address translation mechanism for multiple-sized pages
US5263140A (en) * 1991-01-23 1993-11-16 Silicon Graphics, Inc. Variable page size per entry translation look-aside buffer
DE4102245A1 (de) * 1991-01-24 1992-08-13 Ilka Maschinenfabrik Halle Gmb Sicherheitseinrichtung fuer kaelteaggregate mit ammoniak als kaeltemittel
EP0508577A1 (de) * 1991-03-13 1992-10-14 International Business Machines Corporation Adressübersetzungseinrichtung
EP0506236A1 (de) * 1991-03-13 1992-09-30 International Business Machines Corporation Adressübersetzungseinrichtung
US5327372A (en) * 1992-01-17 1994-07-05 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device
US5465337A (en) * 1992-08-13 1995-11-07 Sun Microsystems, Inc. Method and apparatus for a memory management unit supporting multiple page sizes
US5526504A (en) * 1993-12-15 1996-06-11 Silicon Graphics, Inc. Variable page size translation lookaside buffer

Also Published As

Publication number Publication date
JPH07200409A (ja) 1995-08-04
DE69408922D1 (de) 1998-04-16
US5479627A (en) 1995-12-26
EP0642086A1 (de) 1995-03-08
EP0642086B1 (de) 1998-03-11
US5956756A (en) 1999-09-21

Similar Documents

Publication Publication Date Title
DE69408922T2 (de) Adressumsetzungscache-Speicher zur Umwandlung von virtuellen Adressen in physikalische Adressen, der mehrere Seitengrössen unterstützt
DE69030945T2 (de) Zweistufiger Adressübersetzungspufferspeicher mit partiellen Adressen zur Geschwindigkeitserhöhung
DE69225622D1 (de) Adressenübersetzungspufferspeicher mit per Eingabe veränderlicher Seitengrösse
DE69427625T2 (de) Adressübersetzungsmechanismus für Rechnersystem mit virtuellen Speicher, der eine Vielzahl von Seitengrössen unterstützt
TW474426U (en) Address translation unit supporting variable page sizes
DE69708933D1 (de) Adressenuebersetzung in rechnerbusbrueckegeraeten
DE813709T1 (de) Mikro-tlb mit parallelem zugriff zum beschleunigen der adressübersetzung
DE69629800D1 (de) Adressenübersetzungsbuffer in einem rechnersystem
DE69520718D1 (de) Datenprozessor mit Adressübersetzungsmechanismus
DE69227465D1 (de) Cpu mit pipeline-einheit und effektiv-adressenrechnungseinheit mit möglichkeit zur beibehaltung von virtuellen operandenadressen.
DE69526751D1 (de) Multiprozessorsystem zur lokalen Verwaltung von Adressenübersetzungstabellen
CA2022656A1 (en) Translation look-aside buffer for a computer memory system
DK0662320T3 (da) Tør gelsammensætning
DE3485905T2 (de) Adressenuebersetzungsspeicher.
DE60142841D1 (de) Gemeinsame adressenübersetzung und cachespeicherung
DE69723470D1 (de) Verdickte flüssigwaschmittel mit hohem wassergehalt
GB9518308D0 (en) Virtual page memory buffer
MA23023A1 (fr) Compositions detergentes sous forme de gel.
DE68924414T2 (de) Übersetzung virtueller Adressen.
DE69227740T2 (de) Verarbeitungsanordnung zur dynamischen Adressübersetzung in einem Datenverarbeitungssystem
BR7906784A (pt) Processo e disposicao de circuito para o aumento de volume de enderecos de uma unidade central, sobretudo de um micropocessador
DE3785956T2 (de) Adressuebersetzungsschaltung.
FI970275A0 (fi) Sauvakaavinkokoonpano
EP0180369A3 (en) Cache memory addressable by both physical and virtual addresses
DE68901356D1 (de) Cachespeicher mit pseudo-virtueller adressierung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee