DE69509581T2 - Elektrisch programmierbare Speicherzelle - Google Patents

Elektrisch programmierbare Speicherzelle

Info

Publication number
DE69509581T2
DE69509581T2 DE69509581T DE69509581T DE69509581T2 DE 69509581 T2 DE69509581 T2 DE 69509581T2 DE 69509581 T DE69509581 T DE 69509581T DE 69509581 T DE69509581 T DE 69509581T DE 69509581 T2 DE69509581 T2 DE 69509581T2
Authority
DE
Germany
Prior art keywords
memory cell
programmable memory
electrically programmable
electrically
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69509581T
Other languages
English (en)
Other versions
DE69509581D1 (de
Inventor
Constantin Papadas
Bernard Guillaumot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of DE69509581D1 publication Critical patent/DE69509581D1/de
Application granted granted Critical
Publication of DE69509581T2 publication Critical patent/DE69509581T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H01L21/2815—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects part or whole of the electrode is a sidewall spacer or made by a similar technique, e.g. transformation under mask, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881—Programmable transistors with only two possible levels of programmation
    • H01L29/7883—Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/561—Multilevel memory cell aspects
    • G11C2211/5612—Multilevel memory cell with more than one floating gate
DE69509581T 1994-03-30 1995-03-24 Elektrisch programmierbare Speicherzelle Expired - Fee Related DE69509581T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9404146A FR2718289B1 (fr) 1994-03-30 1994-03-30 Cellule mémoire électriquement programmable.

Publications (2)

Publication Number Publication Date
DE69509581D1 DE69509581D1 (de) 1999-06-17
DE69509581T2 true DE69509581T2 (de) 1999-12-23

Family

ID=9461877

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69509581T Expired - Fee Related DE69509581T2 (de) 1994-03-30 1995-03-24 Elektrisch programmierbare Speicherzelle

Country Status (5)

Country Link
US (2) US5687113A (de)
EP (1) EP0675547B1 (de)
JP (1) JPH07302849A (de)
DE (1) DE69509581T2 (de)
FR (1) FR2718289B1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0926260A3 (de) * 1997-12-12 2001-04-11 Matsushita Electric Industrial Co., Ltd. Verwendung der Antikörper - Antigen Wechselwirkung zur Herstellung eines Metallfilmmusters
FR2776830B1 (fr) 1998-03-26 2001-11-23 Sgs Thomson Microelectronics Cellule memoire electriquement programmable
US6074914A (en) 1998-10-30 2000-06-13 Halo Lsi Design & Device Technology, Inc. Integration method for sidewall split gate flash transistor
US6795348B2 (en) * 2002-05-29 2004-09-21 Micron Technology, Inc. Method and apparatus for erasing flash memory
JP4454921B2 (ja) * 2002-09-27 2010-04-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP4683817B2 (ja) * 2002-09-27 2011-05-18 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6831325B2 (en) * 2002-12-20 2004-12-14 Atmel Corporation Multi-level memory cell with lateral floating spacers
KR100650369B1 (ko) * 2004-10-01 2006-11-27 주식회사 하이닉스반도체 폴리실리콘부유측벽을 갖는 비휘발성메모리장치 및 그제조 방법
US8099783B2 (en) * 2005-05-06 2012-01-17 Atmel Corporation Security method for data protection
US7453127B2 (en) * 2006-02-13 2008-11-18 Taiwan Semiconductor Manufacturing Co., Ltd. Double-diffused-drain MOS device with floating non-insulator spacers
US8969928B2 (en) * 2010-08-31 2015-03-03 Micron Technology, Inc. Transistors having a control gate and one or more conductive structures
TWI710113B (zh) * 2019-11-29 2020-11-11 億而得微電子股份有限公司 電子寫入抹除式可複寫唯讀記憶體的操作方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4203158A (en) * 1978-02-24 1980-05-13 Intel Corporation Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same
DE3345173A1 (de) * 1983-12-14 1985-07-25 Deutsche Itt Industries Gmbh, 7800 Freiburg Verfahren zum aussortieren von unzuverlaessigen integrierten speichern
US4590665A (en) * 1984-12-10 1986-05-27 Solid State Scientific, Inc. Method for double doping sources and drains in an EPROM
US4754320A (en) * 1985-02-25 1988-06-28 Kabushiki Kaisha Toshiba EEPROM with sidewall control gate
JPH06105786B2 (ja) * 1985-08-20 1994-12-21 セイコーエプソン株式会社 不揮発性メモリ−
US4939558A (en) * 1985-09-27 1990-07-03 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
US4804637A (en) * 1985-09-27 1989-02-14 Texas Instruments Incorporated EEPROM memory cell and driving circuitry
JPS63215079A (ja) * 1987-03-04 1988-09-07 Oki Electric Ind Co Ltd Ｅｐｒｏｍ半導体装置およびその製造方法
JPS63248175A (ja) * 1987-04-03 1988-10-14 Mitsubishi Electric Corp 半導体記憶装置
JPH01262669A (ja) * 1988-04-13 1989-10-19 Sony Corp 不揮発性半導体記憶装置
JPH0231466A (ja) * 1988-07-21 1990-02-01 Sony Corp 不揮発性メモリ装置の製造方法
JPH02260564A (ja) * 1989-03-31 1990-10-23 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH0350772A (ja) * 1989-07-18 1991-03-05 Sony Corp 不揮発性メモリ装置の製造方法
JPH03177075A (ja) * 1989-12-06 1991-08-01 Kawasaki Steel Corp 不揮発性半導体記憶装置
US5202576A (en) * 1990-08-29 1993-04-13 Texas Instruments Incorporated Asymmetrical non-volatile memory cell, arrays and methods for fabricating same
KR100243493B1 (ko) * 1990-08-29 2000-02-01 윌리엄 비. 켐플러 비대칭의 비휘발성 메모리셀, 어레이 및 그 제조방법
US5267194A (en) * 1991-08-30 1993-11-30 Winbond Electronics Corporation Electrically erasable programmable read-only-memory cell with side-wall floating gate
US5379253A (en) * 1992-06-01 1995-01-03 National Semiconductor Corporation High density EEPROM cell array with novel programming scheme and method of manufacture
JP2871355B2 (ja) * 1992-11-13 1999-03-17 日本電気株式会社 不揮発性半導体記憶装置のデータ消去方法
JPH06243179A (ja) * 1993-02-12 1994-09-02 Daikin Ind Ltd 画像検索方法およびその装置

Also Published As

Publication number Publication date
JPH07302849A (ja) 1995-11-14
FR2718289A1 (fr) 1995-10-06
DE69509581D1 (de) 1999-06-17
FR2718289B1 (fr) 1996-08-02
EP0675547A1 (de) 1995-10-04
EP0675547B1 (de) 1999-05-12
US5687113A (en) 1997-11-11
US5740103A (en) 1998-04-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee