DE69513126D1 - Verfahren und Gerät zum schnellen Vergleichen für Adressen eines Pufferspeichers mit Fehlerkorrektur - Google Patents
Verfahren und Gerät zum schnellen Vergleichen für Adressen eines Pufferspeichers mit FehlerkorrekturInfo
- Publication number
- DE69513126D1 DE69513126D1 DE69513126T DE69513126T DE69513126D1 DE 69513126 D1 DE69513126 D1 DE 69513126D1 DE 69513126 T DE69513126 T DE 69513126T DE 69513126 T DE69513126 T DE 69513126T DE 69513126 D1 DE69513126 D1 DE 69513126D1
- Authority
- DE
- Germany
- Prior art keywords
- cache
- ecc
- tag
- cache memory
- path
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1064—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in cache or content addressable memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/311,478 US5509119A (en) | 1994-09-23 | 1994-09-23 | Fast comparison method and apparatus for error corrected cache tags |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69513126D1 true DE69513126D1 (de) | 1999-12-09 |
DE69513126T2 DE69513126T2 (de) | 2000-02-24 |
Family
ID=23207053
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69513126T Expired - Lifetime DE69513126T2 (de) | 1994-09-23 | 1995-09-13 | Verfahren und Gerät zum schnellen Vergleichen für Adressen eines Pufferspeichers mit Fehlerkorrektur |
Country Status (4)
Country | Link |
---|---|
US (1) | US5509119A (de) |
EP (1) | EP0706128B1 (de) |
JP (1) | JP3761614B2 (de) |
DE (1) | DE69513126T2 (de) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08106733A (ja) * | 1994-10-07 | 1996-04-23 | Hitachi Ltd | 情報記憶媒体利用システム |
JP2842809B2 (ja) * | 1995-06-28 | 1999-01-06 | 甲府日本電気株式会社 | キャッシュ索引の障害訂正装置 |
US5860104A (en) * | 1995-08-31 | 1999-01-12 | Advanced Micro Devices, Inc. | Data cache which speculatively updates a predicted data cache storage location with store data and subsequently corrects mispredicted updates |
US5987561A (en) | 1995-08-31 | 1999-11-16 | Advanced Micro Devices, Inc. | Superscalar microprocessor employing a data cache capable of performing store accesses in a single clock cycle |
US5752069A (en) * | 1995-08-31 | 1998-05-12 | Advanced Micro Devices, Inc. | Superscalar microprocessor employing away prediction structure |
US5751740A (en) * | 1995-12-14 | 1998-05-12 | Gorca Memory Systems | Error detection and correction system for use with address translation memory controller |
US5838943A (en) * | 1996-03-26 | 1998-11-17 | Advanced Micro Devices, Inc. | Apparatus for speculatively storing and restoring data to a cache memory |
US5916314A (en) * | 1996-09-11 | 1999-06-29 | Sequent Computer Systems, Inc. | Method and apparatus for cache tag mirroring |
US6226763B1 (en) | 1998-07-29 | 2001-05-01 | Intel Corporation | Method and apparatus for performing cache accesses |
US6321321B1 (en) * | 1999-06-21 | 2001-11-20 | Vlsi Technology, Inc. | Set-associative cache-management method with parallel and single-set sequential reads |
JP3922844B2 (ja) * | 1999-09-02 | 2007-05-30 | 富士通株式会社 | キャッシュtag制御方法及びこの制御方法を用いた情報処理装置 |
US6629206B1 (en) * | 1999-12-31 | 2003-09-30 | Koninklijke Philips Electronics N.V. | Set-associative cache-management using parallel reads and serial reads initiated during a wait state |
US20020147955A1 (en) * | 2000-05-11 | 2002-10-10 | James Robert W. | Internal storage memory with EDAC protection |
US7120836B1 (en) * | 2000-11-07 | 2006-10-10 | Unisys Corporation | System and method for increasing cache hit detection performance |
US6571317B2 (en) | 2001-05-01 | 2003-05-27 | Broadcom Corporation | Replacement data error detector |
US6941493B2 (en) * | 2002-02-27 | 2005-09-06 | Sun Microsystems, Inc. | Memory subsystem including an error detection mechanism for address and control signals |
US20040083334A1 (en) * | 2002-10-28 | 2004-04-29 | Sandisk Corporation | Method and apparatus for managing the integrity of data in non-volatile memory system |
US6996675B2 (en) * | 2002-12-20 | 2006-02-07 | International Business Machines Corporation | Retrieval of all tag entries of cache locations for memory address and determining ECC based on same |
US7426682B2 (en) * | 2003-03-11 | 2008-09-16 | Via Technologies, Inc. | Method of generating error detection codes |
DE10327549A1 (de) * | 2003-06-18 | 2005-01-13 | Robert Bosch Gmbh | Verfahren und Vorrichtung zur Fehlererkennung für einen Cachespeicher und entsprechender Cachespeicher |
JP4260805B2 (ja) * | 2003-07-29 | 2009-04-30 | 富士通株式会社 | Cam装置およびcam制御方法 |
US7117290B2 (en) * | 2003-09-03 | 2006-10-03 | Advanced Micro Devices, Inc. | MicroTLB and micro tag for reducing power in a processor |
US20050050278A1 (en) * | 2003-09-03 | 2005-03-03 | Advanced Micro Devices, Inc. | Low power way-predicted cache |
US7275202B2 (en) * | 2004-04-07 | 2007-09-25 | International Business Machines Corporation | Method, system and program product for autonomous error recovery for memory devices |
US8051337B2 (en) * | 2009-01-22 | 2011-11-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | System and method for fast cache-hit detection |
JP2011100269A (ja) * | 2009-11-05 | 2011-05-19 | Renesas Electronics Corp | キャッシュシステム |
US20110161783A1 (en) * | 2009-12-28 | 2011-06-30 | Dinesh Somasekhar | Method and apparatus on direct matching of cache tags coded with error correcting codes (ecc) |
US8707131B2 (en) * | 2011-03-25 | 2014-04-22 | Intel Corporation | Apparatus and method for fast tag hit |
US8910017B2 (en) | 2012-07-02 | 2014-12-09 | Sandisk Technologies Inc. | Flash memory with random partition |
US9104542B2 (en) * | 2012-12-28 | 2015-08-11 | Intel Corporation | Apparatus and method for fast tag hit with double error correction and triple error detection |
US9146808B1 (en) * | 2013-01-24 | 2015-09-29 | Emulex Corporation | Soft error protection for content addressable memory |
ITMI20130879A1 (it) * | 2013-05-30 | 2014-12-01 | Tenova Spa | Cilindro di laminazione |
US9740557B2 (en) * | 2014-02-25 | 2017-08-22 | Imagination Technologies Limited | Pipelined ECC-protected memory access |
JP2016062513A (ja) * | 2014-09-19 | 2016-04-25 | 株式会社東芝 | プロセッサおよびプロセッサシステム |
TWI703567B (zh) * | 2020-01-15 | 2020-09-01 | 點序科技股份有限公司 | 記憶體資料的搜尋方法應用於資料儲存裝置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4092713A (en) * | 1977-06-13 | 1978-05-30 | Sperry Rand Corporation | Post-write address word correction in cache memory system |
US4483003A (en) * | 1982-07-21 | 1984-11-13 | At&T Bell Laboratories | Fast parity checking in cache tag memory |
US4884270A (en) * | 1986-12-11 | 1989-11-28 | Texas Instruments Incorporated | Easily cascadable and testable cache memory |
IT1202527B (it) * | 1987-02-12 | 1989-02-09 | Honeywell Inf Systems | Sistema di memoria e relativo apparato di rivelazione-correzione di errore |
US4995041A (en) * | 1989-02-03 | 1991-02-19 | Digital Equipment Corporation | Write back buffer with error correcting capabilities |
US5251310A (en) * | 1990-06-29 | 1993-10-05 | Digital Equipment Corporation | Method and apparatus for exchanging blocks of information between a cache memory and a main memory |
US5287512A (en) * | 1990-08-06 | 1994-02-15 | Ncr Corporation | Computer memory system and method for cleaning data elements |
US5233616A (en) * | 1990-10-01 | 1993-08-03 | Digital Equipment Corporation | Write-back cache with ECC protection |
US5226150A (en) * | 1990-10-01 | 1993-07-06 | Digital Equipment Corporation | Apparatus for suppressing an error report from an address for which an error has already been reported |
-
1994
- 1994-09-23 US US08/311,478 patent/US5509119A/en not_active Expired - Lifetime
-
1995
- 1995-09-13 EP EP95306420A patent/EP0706128B1/de not_active Expired - Lifetime
- 1995-09-13 DE DE69513126T patent/DE69513126T2/de not_active Expired - Lifetime
- 1995-09-22 JP JP26923695A patent/JP3761614B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69513126T2 (de) | 2000-02-24 |
EP0706128B1 (de) | 1999-11-03 |
US5509119A (en) | 1996-04-16 |
JP3761614B2 (ja) | 2006-03-29 |
EP0706128A1 (de) | 1996-04-10 |
JPH0895856A (ja) | 1996-04-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: HEWLETT-PACKARD CO. (N.D.GES.D.STAATES DELAWARE), |
|
8327 | Change in the person/name/address of the patent owner |
Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE |