DE69517016D1 - Pll für rechtecksignale - Google Patents

Pll für rechtecksignale

Info

Publication number
DE69517016D1
DE69517016D1 DE69517016T DE69517016T DE69517016D1 DE 69517016 D1 DE69517016 D1 DE 69517016D1 DE 69517016 T DE69517016 T DE 69517016T DE 69517016 T DE69517016 T DE 69517016T DE 69517016 D1 DE69517016 D1 DE 69517016D1
Authority
DE
Germany
Prior art keywords
pll
rectangular signals
rectangular
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69517016T
Other languages
English (en)
Other versions
DE69517016T2 (de
Inventor
Cornelis Nauta
Wilhelmus Eikenbroek
Der Arend Gerardus Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Ericsson Radio Systems BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from NL9402129A external-priority patent/NL9402129A/nl
Application filed by Ericsson Radio Systems BV filed Critical Ericsson Radio Systems BV
Application granted granted Critical
Publication of DE69517016D1 publication Critical patent/DE69517016D1/de
Publication of DE69517016T2 publication Critical patent/DE69517016T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/12—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a scanning signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
DE69517016T 1994-12-15 1995-12-15 Phasenregelkreis für Signale mit rechtwinkliger Wellenform Expired - Fee Related DE69517016T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NL9402129A NL9402129A (nl) 1994-12-15 1994-12-15 Fase-vergrendelde lus voor signalen met rechthoeksgolfvormen.
NL9500491A NL9500491A (nl) 1994-12-15 1995-03-13 Fase-vergrendelde lus voor signalen met rechthoeksgolfvormen.
PCT/NL1995/000422 WO1996019043A1 (en) 1994-12-15 1995-12-15 Phase-locked loop for signals having rectangular waveforms

Publications (2)

Publication Number Publication Date
DE69517016D1 true DE69517016D1 (de) 2000-06-21
DE69517016T2 DE69517016T2 (de) 2000-09-14

Family

ID=26647287

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69517016T Expired - Fee Related DE69517016T2 (de) 1994-12-15 1995-12-15 Phasenregelkreis für Signale mit rechtwinkliger Wellenform

Country Status (6)

Country Link
US (1) US5710526A (de)
EP (1) EP0745288B1 (de)
AU (1) AU4124496A (de)
DE (1) DE69517016T2 (de)
NL (1) NL9500491A (de)
WO (1) WO1996019043A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW419901B (en) * 1997-06-27 2001-01-21 Hitachi Ltd Phase-locked ring circuit, data processing device and data process system
KR100303397B1 (ko) * 1998-06-23 2001-11-22 윤종용 모든합성주파수구간들에서변하지않는루프특성을가지는주파수합성기
US6959063B1 (en) * 2000-02-29 2005-10-25 Telefonaktiebolaget L M Ericsson (Publ) Fractional-N phase locked loop
JP4598691B2 (ja) * 2006-02-22 2010-12-15 富士通セミコンダクター株式会社 Ｐｌｌ回路及び半導体装置
US7847618B2 (en) * 2008-01-08 2010-12-07 International Business Machines Corporation Peak power reduction methods in distributed charge pump systems
US9082057B2 (en) * 2009-08-19 2015-07-14 Intelleflex Corporation RF device with tamper detection
US9571109B2 (en) * 2015-03-27 2017-02-14 International Business Machines Corporation Voltage controlled oscillator runaway prevention

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5467751A (en) * 1977-11-10 1979-05-31 Toshiba Corp Phase synchronizing loop circuit
US4888564A (en) * 1987-11-06 1989-12-19 Victor Company Of Japan, Ltd. Phase-locked loop circuit
US5216387A (en) * 1991-09-10 1993-06-01 John Fluke Mfg. Co., Inc. Noise reduction method and apparatus for phase-locked loops
US5148123A (en) * 1991-11-04 1992-09-15 Alcatel Network Systems, Inc. Negative feedback control loop acquisition aid

Also Published As

Publication number Publication date
US5710526A (en) 1998-01-20
DE69517016T2 (de) 2000-09-14
AU4124496A (en) 1996-07-03
NL9500491A (nl) 1996-02-01
EP0745288B1 (de) 2000-05-17
WO1996019043A1 (en) 1996-06-20
EP0745288A1 (de) 1996-12-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: TELEFONAKTIEBOLAGET LM ERICSSON, STOCKHOLM, SE

8339 Ceased/non-payment of the annual fee