DE69520902T2 - Nichtflüchtige Halbleiterspeicheranordnung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung

Info

Publication number
DE69520902T2
DE69520902T2 DE69520902T DE69520902T DE69520902T2 DE 69520902 T2 DE69520902 T2 DE 69520902T2 DE 69520902 T DE69520902 T DE 69520902T DE 69520902 T DE69520902 T DE 69520902T DE 69520902 T2 DE69520902 T2 DE 69520902T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69520902T
Other languages
English (en)
Other versions
DE69520902D1 (de
Inventor
Kazunori Ohuchi
Tomoharu Tanaka
Gertjan Hemink
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69520902D1 publication Critical patent/DE69520902D1/de
Application granted granted Critical
Publication of DE69520902T2 publication Critical patent/DE69520902T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562Multilevel memory programming aspects
    • G11C2211/5621Multilevel programming verification
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564Miscellaneous aspects
    • G11C2211/5642Multilevel memory with buffers, latches, registers at input or output
DE69520902T 1994-03-15 1995-03-10 Nichtflüchtige Halbleiterspeicheranordnung Expired - Fee Related DE69520902T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4444794 1994-03-15
JP04959495A JP3476952B2 (ja) 1994-03-15 1995-03-09 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69520902D1 DE69520902D1 (de) 2001-06-21
DE69520902T2 true DE69520902T2 (de) 2001-09-27

Family

ID=26384366

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69520902T Expired - Fee Related DE69520902T2 (de) 1994-03-15 1995-03-10 Nichtflüchtige Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5521865A (de)
EP (1) EP0673037B1 (de)
JP (1) JP3476952B2 (de)
KR (1) KR0159456B1 (de)
DE (1) DE69520902T2 (de)

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JP4138291B2 (ja) * 2001-10-19 2008-08-27 スパンション エルエルシー 不揮発性半導体記憶装置及びその制御方法
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KR101357068B1 (ko) * 2005-12-28 2014-02-03 샌디스크 테크놀로지스, 인코포레이티드 비휘발성 메모리들에 대한 바디 효과 감지 방법
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JP3252306B2 (ja) * 1993-08-10 2002-02-04 株式会社日立製作所 半導体不揮発性記憶装置

Also Published As

Publication number Publication date
US5521865A (en) 1996-05-28
KR0159456B1 (ko) 1999-02-01
EP0673037A1 (de) 1995-09-20
DE69520902D1 (de) 2001-06-21
EP0673037B1 (de) 2001-05-16
JPH07307094A (ja) 1995-11-21
JP3476952B2 (ja) 2003-12-10

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