DE69521149D1 - Flimmerreduzierungund bildgrösseneinstellung für einen videokontroller mit zeilensprungvideoausgang - Google Patents

Flimmerreduzierungund bildgrösseneinstellung für einen videokontroller mit zeilensprungvideoausgang

Info

Publication number
DE69521149D1
DE69521149D1 DE69521149T DE69521149T DE69521149D1 DE 69521149 D1 DE69521149 D1 DE 69521149D1 DE 69521149 T DE69521149 T DE 69521149T DE 69521149 T DE69521149 T DE 69521149T DE 69521149 D1 DE69521149 D1 DE 69521149D1
Authority
DE
Germany
Prior art keywords
video
flimer
reduction
image size
size setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69521149T
Other languages
English (en)
Inventor
David Keene
Jimmy Yang
Kevin Chang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cirrus Logic Inc
Original Assignee
Cirrus Logic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cirrus Logic Inc filed Critical Cirrus Logic Inc
Application granted granted Critical
Publication of DE69521149D1 publication Critical patent/DE69521149D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/012—Conversion between an interlaced and a progressive signal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0224—Details of interlacing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G09G2340/04—Changes in size, position or resolution of an image
    • G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
    • G09G2340/0414—Vertical resolution change
DE69521149T 1994-09-30 1995-09-29 Flimmerreduzierungund bildgrösseneinstellung für einen videokontroller mit zeilensprungvideoausgang Expired - Lifetime DE69521149D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/316,167 US5510843A (en) 1994-09-30 1994-09-30 Flicker reduction and size adjustment for video controller with interlaced video output
PCT/US1995/012904 WO1996010887A1 (en) 1994-09-30 1995-09-29 Flicker reduction and size adjustment for video controller with interlaced video output

Publications (1)

Publication Number Publication Date
DE69521149D1 true DE69521149D1 (de) 2001-07-05

Family

ID=23227803

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69521149T Expired - Lifetime DE69521149D1 (de) 1994-09-30 1995-09-29 Flimmerreduzierungund bildgrösseneinstellung für einen videokontroller mit zeilensprungvideoausgang

Country Status (5)

Country Link
US (1) US5510843A (de)
EP (1) EP0806110B1 (de)
DE (1) DE69521149D1 (de)
HK (1) HK1004851A1 (de)
WO (1) WO1996010887A1 (de)

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US6392710B1 (en) 1998-04-03 2002-05-21 Avid Technology, Inc. Graphical user interface for field-based definition of special effects in a video editing system
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FR2784534B1 (fr) * 1998-10-09 2000-12-22 St Microelectronics Sa Procede et circuit d'affichage d'elements d'image incrustes sur une image video
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TW563353B (en) * 2002-03-12 2003-11-21 Via Tech Inc Clock signal synthesizer with multiple frequency outputs and method for synthesizing clock signal
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US7154532B2 (en) * 2003-02-07 2006-12-26 Tektronix, Inc. Video field rate persistence
KR100630888B1 (ko) * 2004-11-23 2006-10-04 삼성전자주식회사 이미지 암부인식률 개선을 위한 장치 및 방법
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JP6019332B2 (ja) * 2012-06-04 2016-11-02 株式会社Ｊｏｌｅｄ 表示装置、画像処理装置、および表示方法

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Also Published As

Publication number Publication date
HK1004851A1 (en) 1998-12-11
EP0806110B1 (de) 2001-05-30
US5510843A (en) 1996-04-23
WO1996010887A1 (en) 1996-04-11
EP0806110A1 (de) 1997-11-12

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Legal Events

Date Code Title Description
8332 No legal effect for de