DE69611150D1 - Verfahren und Anordnung zur Erzeugung eines lauflängebegrenzten Codes mit Gleichstromsteuerung - Google Patents

Verfahren und Anordnung zur Erzeugung eines lauflängebegrenzten Codes mit Gleichstromsteuerung

Info

Publication number
DE69611150D1
DE69611150D1 DE69611150T DE69611150T DE69611150D1 DE 69611150 D1 DE69611150 D1 DE 69611150D1 DE 69611150 T DE69611150 T DE 69611150T DE 69611150 T DE69611150 T DE 69611150T DE 69611150 D1 DE69611150 D1 DE 69611150D1
Authority
DE
Germany
Prior art keywords
generating
arrangement
control
run length
length limited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69611150T
Other languages
English (en)
Other versions
DE69611150T2 (de
Inventor
Ron M Roth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of DE69611150D1 publication Critical patent/DE69611150D1/de
Application granted granted Critical
Publication of DE69611150T2 publication Critical patent/DE69611150T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H03M5/145—Conversion to or from block codes or representations thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
    • G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
DE69611150T 1995-10-27 1996-10-25 Verfahren und Anordnung zur Erzeugung eines lauflängebegrenzten Codes mit Gleichstromsteuerung Expired - Fee Related DE69611150T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/549,377 US6002718A (en) 1995-10-27 1995-10-27 Method and apparatus for generating runlength-limited coding with DC control

Publications (2)

Publication Number Publication Date
DE69611150D1 true DE69611150D1 (de) 2001-01-11
DE69611150T2 DE69611150T2 (de) 2001-04-05

Family

ID=24192775

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69611150T Expired - Fee Related DE69611150T2 (de) 1995-10-27 1996-10-25 Verfahren und Anordnung zur Erzeugung eines lauflängebegrenzten Codes mit Gleichstromsteuerung

Country Status (4)

Country Link
US (1) US6002718A (de)
EP (1) EP0771078B1 (de)
JP (1) JP3772264B2 (de)
DE (1) DE69611150T2 (de)

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US6549666B1 (en) * 1994-09-21 2003-04-15 Ricoh Company, Ltd Reversible embedded wavelet system implementation
US6195764B1 (en) * 1997-01-30 2001-02-27 Fujitsu Network Communications, Inc. Data encoder/decoder for a high speed serial link
US7034719B2 (en) * 2002-09-27 2006-04-25 Samsung Electronics Co., Ltd. Data modulating method and apparatus, data demodulating method and apparatus, and code arranging method
US6195778B1 (en) * 1998-07-30 2001-02-27 Lsi Logic Corp. Demodulation of DVD codewords using dependency-sorted tables for duplicate/dependent and unique/non-dependent mappings
US6177890B1 (en) * 1998-12-04 2001-01-23 Texas Instruments Incorporated Technique for increasing information density in data storage devices by utilizing a high-efficiency encoding scheme
KR100565046B1 (ko) 1999-04-21 2006-03-30 삼성전자주식회사 개선된 ｄｃ 억압 능력을 갖는 ｒｌｌ 코드 배치 방법, 변복조 방법 및 복조 장치
US6259384B1 (en) * 1999-07-09 2001-07-10 Quantum Corporation High rate runlength limited codes for 10-bit ECC symbols
US6417788B1 (en) 1999-07-09 2002-07-09 Maxtor Corporation High rate runlength limited codes for 10-bit ECC symbols
US6201485B1 (en) * 1999-07-09 2001-03-13 Quantum Corp. High rate runlength limited codes for 8-bit ECC symbols
UA71024C2 (uk) * 2000-05-10 2004-11-15 Конінклійке Філіпс Електронікс Н.В. Спосіб перетворення потоку бітів двійкового інформаційного сигналу у потік бітів двійкового канального сигналу, що підпорядковується певним обмеженням, пристрій для кодування, сигнал, який включає в себе потік бітів двійкового канального сигналу, що підпорядковується певним обмеженням, носій запису, спосіб декодування, пристрій для декодування
KR100424482B1 (ko) * 2000-06-22 2004-03-24 엘지전자 주식회사 일련의 데이터 워드를 변조신호로 변환하는 방법 및 장치
PL353622A1 (en) * 2000-08-14 2003-12-01 Koninklije Philips Electronics N.V.Koninklije Philips Electronics N.V. Method of device for adding or extracting a secondary information signal to/from a rll code sequence
US6778483B2 (en) * 2000-11-08 2004-08-17 Matsushita Electric Industrial Co., Ltd. Multilevel record modulator and demodulator
CN100428633C (zh) * 2001-06-29 2008-10-22 日本胜利株式会社 数字信号的调制方法及调制装置
WO2003079557A1 (en) * 2002-03-04 2003-09-25 Seagate Technology Llc Error correction coding utilizing numerical base conversion for modulation coding
JP3757918B2 (ja) * 2002-08-20 2006-03-22 日本電気株式会社 符号化変調方法および変調装置、復調方法および復調装置
KR100917884B1 (ko) * 2003-03-13 2009-09-16 삼성전자주식회사 동기 코드워드의 패리티 정보를 이용하여 ｄｃ 억압이가능한 데이터 변조 방법 및 장치
US7224295B2 (en) * 2005-07-11 2007-05-29 Mediatek Inc. System and method for modulation and demodulation using code subset conversion
TWI330006B (en) * 2007-07-27 2010-09-01 Lite On It Corp Encoding method and encoder for generating balanced code or constant weighted code
ITVI20100175A1 (it) * 2010-06-21 2011-12-22 St Microelectronics Pvt Ltd Sistema per la codifica entropica di video h.264 per applicazioni hdtv in tempo reale
CN103140894B (zh) 2010-08-17 2017-08-22 技术研究及发展基金公司 在非易失性存储器(nvm)单元中减轻单元间耦合效应
US20140143289A1 (en) * 2012-11-20 2014-05-22 Lsi Corporation Constrained System Endec
TWI589892B (zh) * 2015-04-22 2017-07-01 威盛電子股份有限公司 傳輸介面晶片以及內建式傳輸介面晶片測試方法

Family Cites Families (9)

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Publication number Priority date Publication date Assignee Title
US3108261A (en) * 1960-04-11 1963-10-22 Ampex Recording and/or reproducing system
US3518662A (en) * 1965-09-27 1970-06-30 Kokusai Denshin Denwa Co Ltd Digital transmission system using a multilevel pulse signal
US4027335A (en) * 1976-03-19 1977-05-31 Ampex Corporation DC free encoding for data transmission system
US4413251A (en) * 1981-07-16 1983-11-01 International Business Machines Corporation Method and apparatus for generating a noiseless sliding block code for a (1,7) channel with rate 2/3
DE69132824T2 (de) * 1991-12-23 2002-06-27 Alcatel Sa Verfahren zur Reduzierung der Anzahl der Bits in einem binären Adresswort
US5561422A (en) * 1994-05-16 1996-10-01 Daewoo Electronics Co., Ltd. Method and apparatus for variable length coding with reduced memory requirement
US5623517A (en) * 1994-06-21 1997-04-22 U.S. Philips Corporation Transmission system with improved decoding of a block code
US5642112A (en) * 1994-12-29 1997-06-24 Unisys Corporation Method and apparatus for performing LZW data compression utilizing an associative memory
US5663724A (en) * 1996-03-28 1997-09-02 Seagate Technology, Inc. 16B/20B encoder

Also Published As

Publication number Publication date
EP0771078A3 (de) 1997-07-02
JP3772264B2 (ja) 2006-05-10
US6002718A (en) 1999-12-14
EP0771078B1 (de) 2000-12-06
EP0771078A2 (de) 1997-05-02
JPH09223969A (ja) 1997-08-26
DE69611150T2 (de) 2001-04-05

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: HEWLETT-PACKARD COMPANY (A DELAWARE CORPORATION),

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee