DE69614658T2 - Protokoll für Unterbrechungssignale - Google Patents

Protokoll für Unterbrechungssignale

Info

Publication number
DE69614658T2
DE69614658T2 DE69614658T DE69614658T DE69614658T2 DE 69614658 T2 DE69614658 T2 DE 69614658T2 DE 69614658 T DE69614658 T DE 69614658T DE 69614658 T DE69614658 T DE 69614658T DE 69614658 T2 DE69614658 T2 DE 69614658T2
Authority
DE
Germany
Prior art keywords
interrupt signal
signal protocol
protocol
interrupt
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69614658T
Other languages
English (en)
Other versions
DE69614658D1 (de
Inventor
Michael Lee Javernick
Robert Dennis Crawford
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ford Motor Co
Original Assignee
Ford Motor Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ford Motor Co filed Critical Ford Motor Co
Application granted granted Critical
Publication of DE69614658D1 publication Critical patent/DE69614658D1/de
Publication of DE69614658T2 publication Critical patent/DE69614658T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
DE69614658T 1996-02-12 1996-12-11 Protokoll für Unterbrechungssignale Expired - Fee Related DE69614658T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/565,653 US5848277A (en) 1996-02-12 1996-02-12 Method for providing both level-sensitive and edge-sensitive interrupt signals on a serial interface between a peripheral and host

Publications (2)

Publication Number Publication Date
DE69614658D1 DE69614658D1 (de) 2001-09-27
DE69614658T2 true DE69614658T2 (de) 2002-06-27

Family

ID=24259572

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614658T Expired - Fee Related DE69614658T2 (de) 1996-02-12 1996-12-11 Protokoll für Unterbrechungssignale

Country Status (5)

Country Link
US (1) US5848277A (de)
EP (1) EP0789304B1 (de)
JP (1) JPH09231090A (de)
CA (1) CA2197255A1 (de)
DE (1) DE69614658T2 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6021458A (en) * 1998-01-21 2000-02-01 Intel Corporation Method and apparatus for handling multiple level-triggered and edge-triggered interrupts
US6775730B2 (en) * 2001-04-18 2004-08-10 Sony Corporation System and method for implementing a flexible interrupt mechanism
US20050190757A1 (en) * 2004-02-27 2005-09-01 Cisco Technology Inc. Interworking between Ethernet and non-Ethernet customer sites for VPLS
EP1596305B1 (de) * 2004-05-11 2007-07-11 STMicroelectronics Limited Unterbrechungsbehandlungssystem
US7643409B2 (en) 2004-08-25 2010-01-05 Cisco Technology, Inc. Computer network with point-to-point pseudowire redundancy
FR2882939B1 (fr) * 2005-03-11 2007-06-08 Centre Nat Rech Scient Dispositif de separation fluidique
US8213435B2 (en) * 2005-04-28 2012-07-03 Cisco Technology, Inc. Comprehensive model for VPLS
US7835370B2 (en) * 2005-04-28 2010-11-16 Cisco Technology, Inc. System and method for DSL subscriber identification over ethernet network
US8194656B2 (en) 2005-04-28 2012-06-05 Cisco Technology, Inc. Metro ethernet network with scaled broadcast and service instance domains
US8175078B2 (en) * 2005-07-11 2012-05-08 Cisco Technology, Inc. Redundant pseudowires between Ethernet access domains
US7889754B2 (en) * 2005-07-12 2011-02-15 Cisco Technology, Inc. Address resolution mechanism for ethernet maintenance endpoints
US7515542B2 (en) * 2005-07-12 2009-04-07 Cisco Technology, Inc. Broadband access note with a virtual maintenance end point
US8169924B2 (en) * 2005-08-01 2012-05-01 Cisco Technology, Inc. Optimal bridging over MPLS/IP through alignment of multicast and unicast paths
US7855950B2 (en) * 2005-08-01 2010-12-21 Cisco Technology, Inc. Congruent forwarding paths for unicast and multicast traffic
US9088619B2 (en) * 2005-09-14 2015-07-21 Cisco Technology, Inc. Quality of service based on logical port identifier for broadband aggregation networks
US7646778B2 (en) * 2007-04-27 2010-01-12 Cisco Technology, Inc. Support of C-tagged service interface in an IEEE 802.1ah bridge
US8804534B2 (en) * 2007-05-19 2014-08-12 Cisco Technology, Inc. Interworking between MPLS/IP and Ethernet OAM mechanisms
US8203943B2 (en) * 2007-08-27 2012-06-19 Cisco Technology, Inc. Colored access control lists for multicast forwarding using layer 2 control protocol
US8312299B2 (en) * 2008-03-28 2012-11-13 Packet Digital Method and apparatus for dynamic power management control using serial bus management protocols
CN114942834A (zh) * 2022-03-31 2022-08-26 上海阵量智能科技有限公司 中断控制器、芯片、计算机设备及中断控制方法、介质

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142625A (en) * 1985-06-12 1992-08-25 Minolta Camera Kabushiki Kaisha One-chip microcomputer including a programmable logic array for interrupt control
US4715031A (en) * 1985-09-23 1987-12-22 Ford Motor Company Vehicular data transfer communication system
PH24865A (en) * 1987-03-24 1990-12-26 Ibm Mode conversion of computer commands
US5101497A (en) * 1988-09-09 1992-03-31 Compaq Computer Corporation Programmable interrupt controller
US5261107A (en) * 1989-11-03 1993-11-09 International Business Machines Corp. Programable interrupt controller
US5179707A (en) * 1990-06-01 1993-01-12 At&T Bell Laboratories Interrupt processing allocation in a multiprocessor system
US5613128A (en) * 1990-12-21 1997-03-18 Intel Corporation Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller
US5396633A (en) * 1992-10-02 1995-03-07 Compaq Computer Corporation Positive pulse format noise-filter and negative pulse format extension circuit for conditioning interrupt request signals
US5499384A (en) * 1992-12-31 1996-03-12 Seiko Epson Corporation Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device
EP0614323B1 (de) * 1993-03-02 1999-11-03 International Business Machines Corporation Verfahren und Vorrichtung zur Übertragung von einem Datenstrom mit hoher Bitfolgefrequenz über unabhängige digitale Kommunikationskanäle
US5551044A (en) * 1994-12-01 1996-08-27 Intel Corporation Method and apparatus for interrupt/SMI# ordering
US5535420A (en) * 1994-12-14 1996-07-09 Intel Corporation Method and apparatus for interrupt signaling in a computer system
US5555413A (en) * 1995-02-17 1996-09-10 International Business Machines Corporation Computer system and method with integrated level and edge interrupt requests at the same interrupt priority

Also Published As

Publication number Publication date
EP0789304B1 (de) 2001-08-22
JPH09231090A (ja) 1997-09-05
US5848277A (en) 1998-12-08
CA2197255A1 (en) 1997-08-13
DE69614658D1 (de) 2001-09-27
EP0789304A1 (de) 1997-08-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee