DE69621983D1 - Struktur und Verfahren zur Montage eines Halbleiterchips - Google Patents

Struktur und Verfahren zur Montage eines Halbleiterchips

Info

Publication number
DE69621983D1
DE69621983D1 DE69621983T DE69621983T DE69621983D1 DE 69621983 D1 DE69621983 D1 DE 69621983D1 DE 69621983 T DE69621983 T DE 69621983T DE 69621983 T DE69621983 T DE 69621983T DE 69621983 D1 DE69621983 D1 DE 69621983D1
Authority
DE
Germany
Prior art keywords
assembling
semiconductor chip
chip
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69621983T
Other languages
English (en)
Other versions
DE69621983T2 (de
Inventor
Michio Horiuchi
Yoichi Harayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP7082385A external-priority patent/JPH08279576A/ja
Priority claimed from JP7083679A external-priority patent/JPH08279533A/ja
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Application granted granted Critical
Publication of DE69621983D1 publication Critical patent/DE69621983D1/de
Publication of DE69621983T2 publication Critical patent/DE69621983T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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DE69621983T 1995-04-07 1996-04-04 Struktur und Verfahren zur Montage eines Halbleiterchips Expired - Fee Related DE69621983T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7082385A JPH08279576A (ja) 1995-04-07 1995-04-07 半導体素子の実装構造体及び半導体素子の実装方法
JP7083679A JPH08279533A (ja) 1995-04-10 1995-04-10 半導体装置及び半導体素子搭載用フィルム

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EP0740340A2 (de) 1996-10-30

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