DE69628034D1 - Hochimpedanzmodus für jtag - Google Patents

Hochimpedanzmodus für jtag

Info

Publication number
DE69628034D1
DE69628034D1 DE69628034T DE69628034T DE69628034D1 DE 69628034 D1 DE69628034 D1 DE 69628034D1 DE 69628034 T DE69628034 T DE 69628034T DE 69628034 T DE69628034 T DE 69628034T DE 69628034 D1 DE69628034 D1 DE 69628034D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit chip
high impedance
shift register
jtag
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69628034T
Other languages
English (en)
Other versions
DE69628034T2 (de
Inventor
Randall Mote
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE69628034D1 publication Critical patent/DE69628034D1/de
Application granted granted Critical
Publication of DE69628034T2 publication Critical patent/DE69628034T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318558—Addressing or selecting of subparts of the device under test
DE69628034T 1995-12-19 1996-09-26 Hochimpedanzmodus für jtag Expired - Lifetime DE69628034T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/574,593 US5631912A (en) 1995-12-19 1995-12-19 High impedance test mode for JTAG
US574593 1995-12-19
PCT/US1996/014837 WO1997022885A1 (en) 1995-12-19 1996-09-26 High impedance test mode for jtag

Publications (2)

Publication Number Publication Date
DE69628034D1 true DE69628034D1 (de) 2003-06-12
DE69628034T2 DE69628034T2 (de) 2004-02-19

Family

ID=24296783

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69628034T Expired - Lifetime DE69628034T2 (de) 1995-12-19 1996-09-26 Hochimpedanzmodus für jtag

Country Status (11)

Country Link
US (1) US5631912A (de)
EP (1) EP0868667B1 (de)
JP (1) JP3565863B2 (de)
KR (1) KR100262424B1 (de)
CN (1) CN1119667C (de)
AU (1) AU7239396A (de)
DE (1) DE69628034T2 (de)
IL (1) IL124782A (de)
RU (1) RU2191396C2 (de)
TW (1) TW420754B (de)
WO (1) WO1997022885A1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7308629B2 (en) 2004-12-07 2007-12-11 Texas Instruments Incorporated Addressable tap domain selection circuit with TDI/TDO external terminal
US5881254A (en) * 1996-06-28 1999-03-09 Lsi Logic Corporation Inter-bus bridge circuit with integrated memory port
US5937174A (en) * 1996-06-28 1999-08-10 Lsi Logic Corporation Scalable hierarchial memory structure for high data bandwidth raid applications
US5715256A (en) * 1996-09-27 1998-02-03 Sun Microsystems, Inc. Method and apparatus for handling multiplexer contention during scan
US5935266A (en) * 1996-11-15 1999-08-10 Lucent Technologies Inc. Method for powering-up a microprocessor under debugger control
US5781488A (en) * 1997-04-18 1998-07-14 Mosel Vitelic Corporation DRAM with new I/O data path configuration
JP3094983B2 (ja) * 1998-03-12 2000-10-03 日本電気株式会社 システムロジックのテスト回路およびテスト方法
US5982683A (en) * 1998-03-23 1999-11-09 Advanced Micro Devices, Inc. Enhanced method of testing semiconductor devices having nonvolatile elements
US6100743A (en) * 1998-08-25 2000-08-08 Lucent Technologies Inc. Circuit arrangement for adding functionality to a circuit with reduced propagation delays
US6324663B1 (en) * 1998-10-22 2001-11-27 Vlsi Technology, Inc. System and method to test internal PCI agents
US6598178B1 (en) * 1999-06-01 2003-07-22 Agere Systems Inc. Peripheral breakpoint signaler
US7092041B2 (en) * 2000-12-20 2006-08-15 Thomson Licensing I2C bus control for isolating selected IC's for fast I2C bus communication
US7032146B2 (en) * 2002-10-29 2006-04-18 International Business Machines Corporation Boundary scan apparatus and interconnect test method
US20050099832A1 (en) * 2003-11-12 2005-05-12 Agere Systems, Incorporated System and method for securing an integrated circuit as against subsequent reprogramming
CN100370269C (zh) * 2003-11-19 2008-02-20 华为技术有限公司 一种边界扫描测试控制器及边界扫描测试方法
US7219258B2 (en) * 2003-12-10 2007-05-15 International Business Machines Corporation Method, system, and product for utilizing a power subsystem to diagnose and recover from errors
US7395471B2 (en) 2004-06-17 2008-07-01 Texas Instruments Incorporated Connection of auxiliary circuitry to tap and instruction register controls
CN1332208C (zh) * 2005-07-07 2007-08-15 中国航天科技集团公司第五研究院第五一四研究所 数字模拟阻抗标准器
US8332560B2 (en) * 2005-07-11 2012-12-11 Dell Products L.P. System and method for identifying inoperable connection points in a storage enclosure
US8478979B2 (en) * 2010-09-09 2013-07-02 Hewlett-Packard Development Company, L.P. Disable a feature of a computing machine
CN106918724A (zh) * 2015-12-24 2017-07-04 英业达科技有限公司 适用于快捷外设互联标准插槽的测试电路板
CN108363650A (zh) * 2018-01-08 2018-08-03 郑州云海信息技术有限公司 一种多节点服务器自动控制jtag拓扑的系统和方法
RU2703493C1 (ru) * 2018-12-28 2019-10-17 федеральное государственное автономное образовательное учреждение высшего образования "Самарский национальный исследовательский университет имени академика С.П. Королёва" Способ локализации дефектов короткого замыкания выводов микросхем JTAG интерфейсом и устройство для его осуществления
KR102170181B1 (ko) 2019-06-05 2020-10-26 에스케이텔레콤 주식회사 통신 품질 모니터링 장치 및 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5084874A (en) * 1988-09-07 1992-01-28 Texas Instruments Incorporated Enhanced test circuit
US5153882A (en) * 1990-03-29 1992-10-06 National Semiconductor Corporation Serial scan diagnostics apparatus and method for a memory device
JP2513904B2 (ja) * 1990-06-12 1996-07-10 株式会社東芝 テスト容易化回路
US5210759A (en) * 1990-11-19 1993-05-11 Motorola, Inc. Data processing system having scan testing using set latches for selectively observing test data
US5455517A (en) * 1992-06-09 1995-10-03 International Business Machines Corporation Data output impedance control

Also Published As

Publication number Publication date
EP0868667B1 (de) 2003-05-07
WO1997022885A1 (en) 1997-06-26
JP2000502445A (ja) 2000-02-29
CN1219241A (zh) 1999-06-09
TW420754B (en) 2001-02-01
AU7239396A (en) 1997-07-14
EP0868667A4 (de) 1999-04-07
IL124782A (en) 2001-06-14
KR100262424B1 (en) 2000-08-01
RU2191396C2 (ru) 2002-10-20
JP3565863B2 (ja) 2004-09-15
CN1119667C (zh) 2003-08-27
EP0868667A1 (de) 1998-10-07
DE69628034T2 (de) 2004-02-19
IL124782A0 (en) 1999-01-26
US5631912A (en) 1997-05-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition